T. Ogura, M. Mihara, Y. Kawajiri, K. Kobayashi, S. Shimizu, S. Shukuri, N. Ajika, M. Nakashima
{"title":"90nm浮栅“B4-Flash”存储技术——突破NOR闪存栅长度限制","authors":"T. Ogura, M. Mihara, Y. Kawajiri, K. Kobayashi, S. Shimizu, S. Shukuri, N. Ajika, M. Nakashima","doi":"10.1109/IMW.2009.5090573","DOIUrl":null,"url":null,"abstract":"A 90 nm floating gate NOR B4-Flash memory with IF (F: minimum feature size) gate length cell has been investigated by using 64 Mbit test chip to evaluate the scalability of B4-Flash memory. 90 nm (=1F) gate length of memory cell is shortest in many NOR flash memories reported previously. Basic program and erase characteristics and robust program disturb immunity of B4-Flash memory utilizing NMOS select transistor in memory cell array have been demonstrated. Furthermore, to simplify the peripheral circuits and reduce a die size, a new charge pump circuit which can generate both positive and negative high voltage at a supply voltage of 1.8 V has been introduced.","PeriodicalId":113507,"journal":{"name":"2009 IEEE International Memory Workshop","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"A 90nm Floating Gate \\\"B4-Flash\\\" Memory Technology- Breakthrough of the Gate Length Limitation on NOR Flash Memory\",\"authors\":\"T. Ogura, M. Mihara, Y. Kawajiri, K. Kobayashi, S. Shimizu, S. Shukuri, N. Ajika, M. Nakashima\",\"doi\":\"10.1109/IMW.2009.5090573\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 90 nm floating gate NOR B4-Flash memory with IF (F: minimum feature size) gate length cell has been investigated by using 64 Mbit test chip to evaluate the scalability of B4-Flash memory. 90 nm (=1F) gate length of memory cell is shortest in many NOR flash memories reported previously. Basic program and erase characteristics and robust program disturb immunity of B4-Flash memory utilizing NMOS select transistor in memory cell array have been demonstrated. Furthermore, to simplify the peripheral circuits and reduce a die size, a new charge pump circuit which can generate both positive and negative high voltage at a supply voltage of 1.8 V has been introduced.\",\"PeriodicalId\":113507,\"journal\":{\"name\":\"2009 IEEE International Memory Workshop\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-05-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE International Memory Workshop\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMW.2009.5090573\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE International Memory Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMW.2009.5090573","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 90nm Floating Gate "B4-Flash" Memory Technology- Breakthrough of the Gate Length Limitation on NOR Flash Memory
A 90 nm floating gate NOR B4-Flash memory with IF (F: minimum feature size) gate length cell has been investigated by using 64 Mbit test chip to evaluate the scalability of B4-Flash memory. 90 nm (=1F) gate length of memory cell is shortest in many NOR flash memories reported previously. Basic program and erase characteristics and robust program disturb immunity of B4-Flash memory utilizing NMOS select transistor in memory cell array have been demonstrated. Furthermore, to simplify the peripheral circuits and reduce a die size, a new charge pump circuit which can generate both positive and negative high voltage at a supply voltage of 1.8 V has been introduced.