一种具有33%电流复用负电导调节结构的高增益、低功耗、低噪声差分CMOS LNA

To-Po Wang, Shih-Hua Chiang
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引用次数: 2

摘要

提出了一种具有高增益、低直流功耗和低噪声因数的集成差分CMOS低噪声放大器。通过在差分LNA中引入电流重复使用的负电导调节结构,可以有效地增加LNA的跨电导,从而提高差分LNA的性能。为了表征差分LNA的性能改进,设计并制造了两种具有和不具有33.3%电流重复使用负电导调节结构的差分LNA进行比较。在电源电压为0.65 v VDD1和1.2 v VDD2时,差分LNA的测量增益可以从13.1 dB显著提高到15.8 dB,增益增加2.7 dB。采用负电导调节结构的差分LNA的直流功耗为11.48 mW。此外,具有电流重复使用负电导调节结构的差分LNA的实测噪声系数为3.3 dB。与先前发表的相同频率的0.18 μm CMOS LNA相比,该差分LNA采用电流复用负电导调节结构,实现了高增益、低直流功耗和低噪声。
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A high-gain low-power low-noise-figure differential CMOS LNA with 33% current-reused negative-conductance accommodation structure
An integrated differential CMOS low-noise amplifier (LNA) with high gain, low dc power consumption, and low noise figure is presented in this paper. By introducing a current-reused negative-conductance accommodation structure to a differential LNA, the transconductance of the LNA can be effectively increased, leading to a performance enhanced differential LNA. To characterize the performance improvement of the differential LNA, two differential LNAs with and without the 33.3% current-reused negative-conductance accommodation structure were designed and fabricated for comparison. At supply voltages of 0.65-V VDD1 and 1.2-V VDD2, the measured gain of the differential LNA can be significantly improved from 13.1 dB to 15.8 dB, leading to a remarkable 2.7-dB gain increment. The measured dc power dissipation of the presented differential LNA with negative-conductance accommodation structure is 11.48 mW. In addition, the measured noise figure of the differential LNA with a current-reused negative-conductance accommodation structure is 3.3 dB. Compared to previously published 0.18-μm CMOS LNAs at the same frequency of interest, the proposed differential LNA with the current-reused negative-conductance accommodation structure achieves the high gain, low dc power dissipation, and low noise figure.
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