{"title":"毫米波范围内寄生电容对钝化InAlAs/InGaAs hemt性能的影响","authors":"O. Schuler, H. Fourre, R. Fauquembergue, A. Cappy","doi":"10.1109/ICIPRM.1996.492332","DOIUrl":null,"url":null,"abstract":"High performance in the millimeter wave range have been already reported for InAlAs/InGaAs High Electron Mobility Transistors (HEMTs) on InP substrates. High frequency performance is essentially limited by two elements : the feedback capacitance Cgd and the gate resistance Rg. On the first hand, many different gate geometries such as T-gate or /spl Gamma/-gate have been developed to improve Rg. On the other hand, for operation stability and better reliability of MMIC's using HEMTs, devices must be coated with a dielectric layer. However, the passivation layer increases the parasitic capacitances and then, decreases the device performance. In this paper, we present a study of the influence of parasitic capacitances such as feedback capacitance on the high-frequency characteristics of InP-based HEMTs with T-gate supported by a Si/sub 3/N/sub 4/ passivation layer. Extraction of S-parameters from 1 to 40 GHz, and noise measurement at 94 GHz have been performed on 0.12-0.15 /spl mu/m gate length samples. First, we investigate the consequence of the cap layer underetch on the parasitic capacitances. Secondly, the effect of the dielectric coating layer under the top of the T-gate is examined.","PeriodicalId":268278,"journal":{"name":"Proceedings of 8th International Conference on Indium Phosphide and Related Materials","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-04-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Influence of parasitic capacitances on the performance of passivated InAlAs/InGaAs HEMTs in the millimeter wave range\",\"authors\":\"O. Schuler, H. Fourre, R. Fauquembergue, A. Cappy\",\"doi\":\"10.1109/ICIPRM.1996.492332\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"High performance in the millimeter wave range have been already reported for InAlAs/InGaAs High Electron Mobility Transistors (HEMTs) on InP substrates. High frequency performance is essentially limited by two elements : the feedback capacitance Cgd and the gate resistance Rg. On the first hand, many different gate geometries such as T-gate or /spl Gamma/-gate have been developed to improve Rg. On the other hand, for operation stability and better reliability of MMIC's using HEMTs, devices must be coated with a dielectric layer. However, the passivation layer increases the parasitic capacitances and then, decreases the device performance. In this paper, we present a study of the influence of parasitic capacitances such as feedback capacitance on the high-frequency characteristics of InP-based HEMTs with T-gate supported by a Si/sub 3/N/sub 4/ passivation layer. Extraction of S-parameters from 1 to 40 GHz, and noise measurement at 94 GHz have been performed on 0.12-0.15 /spl mu/m gate length samples. First, we investigate the consequence of the cap layer underetch on the parasitic capacitances. Secondly, the effect of the dielectric coating layer under the top of the T-gate is examined.\",\"PeriodicalId\":268278,\"journal\":{\"name\":\"Proceedings of 8th International Conference on Indium Phosphide and Related Materials\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-04-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 8th International Conference on Indium Phosphide and Related Materials\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICIPRM.1996.492332\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 8th International Conference on Indium Phosphide and Related Materials","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIPRM.1996.492332","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Influence of parasitic capacitances on the performance of passivated InAlAs/InGaAs HEMTs in the millimeter wave range
High performance in the millimeter wave range have been already reported for InAlAs/InGaAs High Electron Mobility Transistors (HEMTs) on InP substrates. High frequency performance is essentially limited by two elements : the feedback capacitance Cgd and the gate resistance Rg. On the first hand, many different gate geometries such as T-gate or /spl Gamma/-gate have been developed to improve Rg. On the other hand, for operation stability and better reliability of MMIC's using HEMTs, devices must be coated with a dielectric layer. However, the passivation layer increases the parasitic capacitances and then, decreases the device performance. In this paper, we present a study of the influence of parasitic capacitances such as feedback capacitance on the high-frequency characteristics of InP-based HEMTs with T-gate supported by a Si/sub 3/N/sub 4/ passivation layer. Extraction of S-parameters from 1 to 40 GHz, and noise measurement at 94 GHz have been performed on 0.12-0.15 /spl mu/m gate length samples. First, we investigate the consequence of the cap layer underetch on the parasitic capacitances. Secondly, the effect of the dielectric coating layer under the top of the T-gate is examined.