一种新型的片上系统制备材料组合

Q. Tong, L. Huang, Y. Chao, Q. Gang, U. Goesele
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摘要

半导体绝缘体(insulator-on-semiconductor,简称IOS)作为一种新型的材料组合已经出现在片上系统的制备中。对于高频移动通信系统,高q因子和低温系数SAW滤波器、表面谐振器和振荡器需要一层薄的压电或铁电氧化物晶体,如石英、LiTaO/sub 3/或LiNbO/sub 3/ on Si。将这些材料与硅结合可以将电子和声学器件集成在同一芯片上。因此可以实现电压控制和温度补偿的高q因子晶体振荡器和谐振器。高性能砷化镓光电探测器与LiNbO/sub - 3/波导的集成使集成光学电路成为可能。通过在Si或III-V半导体上制备单晶过渡金属氧化物(如磁性石榴石)的薄层,由于片上薄膜光学隔离器和循环器的可用性,可以实现稳定的激光二极管。通过晶圆键合和h诱导层分裂的层转移为制备IOS提供了一种可制造的技术。在本研究中,我们报告了c-蓝宝石、LaAlO/sub 2/、PLZT和LiNbO/sub 3/等多种单晶绝缘体的绝缘层制备IOS的可行性研究结果。我们已经证明,如果在每种材料的特定温度范围内的晶圆温度下进行H注入,这些材料的表面起泡和层分裂是可能的。
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IOS-a new type of materials combination for system-on-a chip preparation
IOS (insulator-on-semiconductor) has emerged as a new type of materials combination for system-on-a chip preparation. For high frequency mobile communication systems, a thin layer of piezoelectric or ferroelectric oxide crystal such as quartz, LiTaO/sub 3/ or LiNbO/sub 3/ on Si is required for high Q-factor and low temperature coefficient SAW filters, surface resonators and oscillators. Combining these materials with Si can lead to the integration of electronic and acoustic devices on the same chip. Voltage-controlled and temperature-compensated high Q-factor crystal oscillators and resonators can thus be realized. The integration of high performance GaAs photodetectors with LiNbO/sub 3/ waveguides makes integrated optical circuits possible. By preparing a thin layer of single crystalline transition metal oxides such as magnetic garnets on Si or on III-V semiconductors, stabilized laser diodes can be realized due to the availability of on-chip thin film optical isolators and circulators. Layer transfer by wafer bonding and H-induced layer splitting provides a manufacturable technology for IOS preparation. In this study, we report feasibility study results for IOS preparation with an insulator layer of many single crystalline insulators such as c-sapphire, LaAlO/sub 2/, PLZT and LiNbO/sub 3/. We have demonstrated that surface blistering and layer splitting of these materials is possible if H implantation is performed at wafer temperatures within the specific temperature range for each material.
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