{"title":"一种用于25gb /s CMOS串行链路接收机的带去耦控制回路的PAM-4自适应模拟均衡器","authors":"Shunbin Li, Peng Liu, Weidong Wang, X. Fang, Dong Wu, Xiang-hui Xie","doi":"10.1109/SOCC.2015.7406950","DOIUrl":null,"url":null,"abstract":"PAM-4 signaling is an effective solution for high-speed CMOS serial-link transceivers, but it suffers from the difficulty of signal regeneration in analog front-end owning to its multi-level characteristics. An adaptive analog equalizer with decoupling control loops is proposed to address the nonlinearity of amplifiers. A low-frequency gain invariant equalizer and a golden signal generator are designed to serve boost and swing control loops, respectively. An integrating charge pump is employed to improve the convergence performance of receiver. Transistor-level simulation results show that the proposed adaptive analog equalizer in 40-nm CMOS technology can recover 25 Gb/s random data transmitted over a 29.8 inches Megtron6 printed circuit board (PCB) copper channel.","PeriodicalId":329464,"journal":{"name":"2015 28th IEEE International System-on-Chip Conference (SOCC)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A PAM-4 adaptive analog equalizer with decoupling control loops for 25-Gb/s CMOS serial-link receiver\",\"authors\":\"Shunbin Li, Peng Liu, Weidong Wang, X. Fang, Dong Wu, Xiang-hui Xie\",\"doi\":\"10.1109/SOCC.2015.7406950\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"PAM-4 signaling is an effective solution for high-speed CMOS serial-link transceivers, but it suffers from the difficulty of signal regeneration in analog front-end owning to its multi-level characteristics. An adaptive analog equalizer with decoupling control loops is proposed to address the nonlinearity of amplifiers. A low-frequency gain invariant equalizer and a golden signal generator are designed to serve boost and swing control loops, respectively. An integrating charge pump is employed to improve the convergence performance of receiver. Transistor-level simulation results show that the proposed adaptive analog equalizer in 40-nm CMOS technology can recover 25 Gb/s random data transmitted over a 29.8 inches Megtron6 printed circuit board (PCB) copper channel.\",\"PeriodicalId\":329464,\"journal\":{\"name\":\"2015 28th IEEE International System-on-Chip Conference (SOCC)\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 28th IEEE International System-on-Chip Conference (SOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2015.7406950\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 28th IEEE International System-on-Chip Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2015.7406950","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A PAM-4 adaptive analog equalizer with decoupling control loops for 25-Gb/s CMOS serial-link receiver
PAM-4 signaling is an effective solution for high-speed CMOS serial-link transceivers, but it suffers from the difficulty of signal regeneration in analog front-end owning to its multi-level characteristics. An adaptive analog equalizer with decoupling control loops is proposed to address the nonlinearity of amplifiers. A low-frequency gain invariant equalizer and a golden signal generator are designed to serve boost and swing control loops, respectively. An integrating charge pump is employed to improve the convergence performance of receiver. Transistor-level simulation results show that the proposed adaptive analog equalizer in 40-nm CMOS technology can recover 25 Gb/s random data transmitted over a 29.8 inches Megtron6 printed circuit board (PCB) copper channel.