V. Ferlet-Cavrois, A. Bracale, N. Fel, O. Musseau, C. Raynaud, O. Faynot, J. Pelloie
{"title":"SOI动态阈值电压MOS晶体管的高频特性","authors":"V. Ferlet-Cavrois, A. Bracale, N. Fel, O. Musseau, C. Raynaud, O. Faynot, J. Pelloie","doi":"10.1109/SOI.1999.819840","DOIUrl":null,"url":null,"abstract":"The DTMOS architecture is particularly suited to very low supply voltage applications (0.5-0.6 V) (Colinge, 1987; Matloubian, 1993; Assaderaghi et al., 1994; Pelloie et al., 1999). This paper presents the high frequency behavior of DTMOS devices processed with a partially depleted 0.25 /spl mu/m SOI technology (Wilson et al., 1997; Lagnado and de la Houssaye, 1997; Cable, 1997; Ferlet-Cavrois et al., 1998; Tanaka et al., 1997). The paper compares DTMOS to floating body and grounded body MOS transistors, and shows the advantage of SOI DTMOS for very low power portable telecommunication systems.","PeriodicalId":117832,"journal":{"name":"1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"High frequency characterization of SOI dynamic threshold voltage MOS (DTMOS) transistors\",\"authors\":\"V. Ferlet-Cavrois, A. Bracale, N. Fel, O. Musseau, C. Raynaud, O. Faynot, J. Pelloie\",\"doi\":\"10.1109/SOI.1999.819840\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The DTMOS architecture is particularly suited to very low supply voltage applications (0.5-0.6 V) (Colinge, 1987; Matloubian, 1993; Assaderaghi et al., 1994; Pelloie et al., 1999). This paper presents the high frequency behavior of DTMOS devices processed with a partially depleted 0.25 /spl mu/m SOI technology (Wilson et al., 1997; Lagnado and de la Houssaye, 1997; Cable, 1997; Ferlet-Cavrois et al., 1998; Tanaka et al., 1997). The paper compares DTMOS to floating body and grounded body MOS transistors, and shows the advantage of SOI DTMOS for very low power portable telecommunication systems.\",\"PeriodicalId\":117832,\"journal\":{\"name\":\"1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345)\",\"volume\":\"68 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-10-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOI.1999.819840\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.1999.819840","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
摘要
DTMOS架构特别适合非常低的电源电压应用(0.5-0.6 V) (Colinge, 1987;Matloubian, 1993;Assaderaghi et al., 1994;Pelloie et al., 1999)。本文介绍了部分耗尽0.25 /spl mu/m SOI技术处理的DTMOS器件的高频行为(Wilson et al., 1997;Lagnado and de la Houssaye, 1997;电缆,1997;Ferlet-Cavrois等人,1998;Tanaka et al., 1997)。通过与浮体和接地体MOS晶体管的比较,说明了SOI型DTMOS在极低功耗便携式通信系统中的优势。
High frequency characterization of SOI dynamic threshold voltage MOS (DTMOS) transistors
The DTMOS architecture is particularly suited to very low supply voltage applications (0.5-0.6 V) (Colinge, 1987; Matloubian, 1993; Assaderaghi et al., 1994; Pelloie et al., 1999). This paper presents the high frequency behavior of DTMOS devices processed with a partially depleted 0.25 /spl mu/m SOI technology (Wilson et al., 1997; Lagnado and de la Houssaye, 1997; Cable, 1997; Ferlet-Cavrois et al., 1998; Tanaka et al., 1997). The paper compares DTMOS to floating body and grounded body MOS transistors, and shows the advantage of SOI DTMOS for very low power portable telecommunication systems.