L. Gallin-Martel, D. Dzahini, F. Rarbi, O. Rossetto
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A low power 5 MS/s 14 bit switched capacitors digital to analog converter
The ILC ECAL front-end chip will integrate many functions of the readout electronics including a DAC dedicated to the calibration. We present a 14 bit DAC, designed in a CMOS 0.35 µm process and based on segmented arrays of switched capacitors controlled by a Dynamic Element Matching (DEM) algorithm. This DAC features an INL lower than 0.5 LSB at 5 MHz, and dissipates less than 7 mW.