{"title":"关于屈服和局部设计规则松弛的一些结果","authors":"J. Crépeau, C. Thibeault, Y. Savaria","doi":"10.1109/DFTVS.1993.595745","DOIUrl":null,"url":null,"abstract":"The authors study the influence of the line separation in a bus structure on a circuit cost. This structure was selected because it is easy to analyze and yet widely used. Using an analytical model, It is shown that an optimal design rule exists and how the gains obtained by using this optimal design rule depend on the bus length, the defect size distribution exponent and the clustering parameter. Some of the conclusions apply more generally to the problem of realizing design rules in an integrated circuit.","PeriodicalId":213798,"journal":{"name":"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Some results on yield and local design rule relaxation\",\"authors\":\"J. Crépeau, C. Thibeault, Y. Savaria\",\"doi\":\"10.1109/DFTVS.1993.595745\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors study the influence of the line separation in a bus structure on a circuit cost. This structure was selected because it is easy to analyze and yet widely used. Using an analytical model, It is shown that an optimal design rule exists and how the gains obtained by using this optimal design rule depend on the bus length, the defect size distribution exponent and the clustering parameter. Some of the conclusions apply more generally to the problem of realizing design rules in an integrated circuit.\",\"PeriodicalId\":213798,\"journal\":{\"name\":\"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems\",\"volume\":\"56 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-10-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFTVS.1993.595745\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1993.595745","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Some results on yield and local design rule relaxation
The authors study the influence of the line separation in a bus structure on a circuit cost. This structure was selected because it is easy to analyze and yet widely used. Using an analytical model, It is shown that an optimal design rule exists and how the gains obtained by using this optimal design rule depend on the bus length, the defect size distribution exponent and the clustering parameter. Some of the conclusions apply more generally to the problem of realizing design rules in an integrated circuit.