混合DBC/PCB功率半导体预封装的可靠性筛选

T. Huesgen, V. Polezhaev, Ankit Sharma, Chunlei Liu, M. Montazerian, P. Stadler, N. Pavliček, G. Salvatore
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引用次数: 1

摘要

结合直接键合铜(DBC)衬底的PCB嵌入是一种有吸引力的封装功率半导体的方法,有利于低电感设计,同时依赖于成熟的绝缘材料。然而,这些材料的CTE不匹配可能会导致可靠性问题。本研究提出了一个初步的可靠性筛选,使用简单的IGBT预封装与基于氧化铝的DBC作为测试载体。在-40/150°C的温度循环后,观察到衬底和芯片的断裂,导致导通状态电阻增加。文献资料表明,衬底破坏与埋置无关。为了更深入地了解该技术的局限性,需要进一步研究优化的DBC基板。
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Reliability Screening of a Hybrid DBC/PCB power semiconductor prepackage
PCB embedding in combination with direct-bonded copper (DBC) substrates is an attractive approach for packaging of power semiconductors facilitating low-inductive designs while relying on a proven insulating material. However, the CTE mismatch of these materials could cause reliability issues. This study presents an initial reliability screening using simple IGBT prepackages with alumina-based DBC as test vehicles. After -40/150 °C temperature cycles, fracture of the substrate and the chip is observed, resulting in an increased on-state resistance. Literature data suggest that the substrate failure is independent from the embedding. To gain a deeper understanding of the limitations of the technology, further research with optimized DBC substrates is required.
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