1.2微米，高速，高密度CMOS模拟库

Proceedings of the IEEE 1988 Custom Integrated Circuits Conference Pub Date : 1988-05-16 DOI:10.1109/CICC.1988.20925

J. Trontelj, L. Trontelj, S. Ozbolt, T. Pletersek, V. Kunc

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引用次数: 2

摘要

开发了一种1.2 μ m CMOS工艺，用于设计要求高数字性能和高模拟性能相结合的集成电路。此外，该工艺还可以集成用于电信应用的10v模拟电路。细胞被设计用来利用这项技术，并被整合到一个测试芯片中。初步表征了ADC(模数转换器)单元超高速运算放大器和锁存比较器的性能与高速和高性能模拟应用的需求相称

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1.2 micron, high speed, high density CMOS analog library

A 1.2- mu m CMOS process was developed for the design of integrated circuits requiring high digital performance combined with high analog performance. In addition, the process allows the integration of 10-V analog circuitry for telecommunication applications. Cells were designed to make use of this technology and incorporated in a test chip. Initial characterization of the ADC (analog-to-digital converter) cell ultrahigh-speed operational amplifiers and latch comparator demonstrated performance commensurate with the needs of high-speed and high-performance analog application.<>

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Proceedings of the IEEE 1988 Custom Integrated Circuits Conference

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