一种新的5GHz低噪声放大器内置自检设计

IEEE International SOC Conference, 2004. Proceedings. Pub Date : 2004-11-30 DOI:10.1109/SOCC.2004.1362450

J. Ryu, Bruce C. Kim

{"title":"一种新的5GHz低噪声放大器内置自检设计","authors":"J. Ryu, Bruce C. Kim","doi":"10.1109/SOCC.2004.1362450","DOIUrl":null,"url":null,"abstract":"This paper presents a new low-cost built-in self-test (BIST) circuit for 5GHz low noise amplifier (LNA). The BIST circuit is designed for system-on-chip (SOC) transceiver environment. The proposed BIST circuit measures the LNA specifications such as input impedance, voltage gain, noise figure, and input return loss all in a single SoC environment.","PeriodicalId":184894,"journal":{"name":"IEEE International SOC Conference, 2004. Proceedings.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"A new design for built-in self-test of 5GHz low noise amplifiers\",\"authors\":\"J. Ryu, Bruce C. Kim\",\"doi\":\"10.1109/SOCC.2004.1362450\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new low-cost built-in self-test (BIST) circuit for 5GHz low noise amplifier (LNA). The BIST circuit is designed for system-on-chip (SOC) transceiver environment. The proposed BIST circuit measures the LNA specifications such as input impedance, voltage gain, noise figure, and input return loss all in a single SoC environment.\",\"PeriodicalId\":184894,\"journal\":{\"name\":\"IEEE International SOC Conference, 2004. Proceedings.\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-11-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE International SOC Conference, 2004. Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2004.1362450\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International SOC Conference, 2004. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2004.1362450","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 13

摘要

提出了一种低成本的5GHz低噪声放大器内置自检(BIST)电路。BIST电路是专为片上系统(SOC)收发器环境设计的。所提出的BIST电路在单一SoC环境中测量LNA规格，如输入阻抗、电压增益、噪声系数和输入返回损耗。

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A new design for built-in self-test of 5GHz low noise amplifiers

This paper presents a new low-cost built-in self-test (BIST) circuit for 5GHz low noise amplifier (LNA). The BIST circuit is designed for system-on-chip (SOC) transceiver environment. The proposed BIST circuit measures the LNA specifications such as input impedance, voltage gain, noise figure, and input return loss all in a single SoC environment.

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IEEE International SOC Conference, 2004. Proceedings.

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