{"title":"三维异构嵌入式系统集成平台MorPACK的热分析研究","authors":"Jin-Ju Chue, Chih-Chyau Yang, Shih-Lun Chen, Chun-Chieh Chiu, Yi-Jun Liu, Chun-Chieh Chu, Chien‐Ming Wu, Chun-Ming Huang","doi":"10.1109/ESIME.2011.5765819","DOIUrl":null,"url":null,"abstract":"This paper presents a thermal analysis result for a 3D heterogeneous embedded system integration MorPACK (morphing package) platform. The MorPACK platform is stacked by heterogeneous submodules composed of bare dies, a substrate, connection bridges, and solder balls. Since the tiny, heterogeneous and integrable characteristics of MorPACK platform, it needs to be fabricated in high-density and laminar structure. The cooling ability of forced convection is restricted. This study presents an important characteristic for this 3D structure and two indications to optimize thermal solution for MorPACK structure. The characteristic shows the lowest layer owns the best cooling condition, so the bare die chip with highest power consumption should be placed on the lowest layer. It achieves cooling a 0.45-W consuming chip by 12-degree more than it put on the top layer. One of the indications shows the vertical thermal conductivity can be improved by filling up whole MorPACK with mold material. This skill efficiently cools down the 0.45-W consuming chip by 10-degree more than non-filled-up structure. The other indication shows removing the connection bridges and cutting out the substrate to make a room space for chip placement. With result shown, 50 % height and volume of MorPACK can be minimized and also reduce thermal resistance in out-plan direction.","PeriodicalId":115489,"journal":{"name":"2011 12th Intl. Conf. on Thermal, Mechanical & Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A study on thermal analysis for 3D heterogenous embedded system integration platform MorPACK\",\"authors\":\"Jin-Ju Chue, Chih-Chyau Yang, Shih-Lun Chen, Chun-Chieh Chiu, Yi-Jun Liu, Chun-Chieh Chu, Chien‐Ming Wu, Chun-Ming Huang\",\"doi\":\"10.1109/ESIME.2011.5765819\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a thermal analysis result for a 3D heterogeneous embedded system integration MorPACK (morphing package) platform. The MorPACK platform is stacked by heterogeneous submodules composed of bare dies, a substrate, connection bridges, and solder balls. Since the tiny, heterogeneous and integrable characteristics of MorPACK platform, it needs to be fabricated in high-density and laminar structure. The cooling ability of forced convection is restricted. This study presents an important characteristic for this 3D structure and two indications to optimize thermal solution for MorPACK structure. The characteristic shows the lowest layer owns the best cooling condition, so the bare die chip with highest power consumption should be placed on the lowest layer. It achieves cooling a 0.45-W consuming chip by 12-degree more than it put on the top layer. One of the indications shows the vertical thermal conductivity can be improved by filling up whole MorPACK with mold material. This skill efficiently cools down the 0.45-W consuming chip by 10-degree more than non-filled-up structure. The other indication shows removing the connection bridges and cutting out the substrate to make a room space for chip placement. With result shown, 50 % height and volume of MorPACK can be minimized and also reduce thermal resistance in out-plan direction.\",\"PeriodicalId\":115489,\"journal\":{\"name\":\"2011 12th Intl. Conf. on Thermal, Mechanical & Multi-Physics Simulation and Experiments in Microelectronics and Microsystems\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-04-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 12th Intl. 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A study on thermal analysis for 3D heterogenous embedded system integration platform MorPACK
This paper presents a thermal analysis result for a 3D heterogeneous embedded system integration MorPACK (morphing package) platform. The MorPACK platform is stacked by heterogeneous submodules composed of bare dies, a substrate, connection bridges, and solder balls. Since the tiny, heterogeneous and integrable characteristics of MorPACK platform, it needs to be fabricated in high-density and laminar structure. The cooling ability of forced convection is restricted. This study presents an important characteristic for this 3D structure and two indications to optimize thermal solution for MorPACK structure. The characteristic shows the lowest layer owns the best cooling condition, so the bare die chip with highest power consumption should be placed on the lowest layer. It achieves cooling a 0.45-W consuming chip by 12-degree more than it put on the top layer. One of the indications shows the vertical thermal conductivity can be improved by filling up whole MorPACK with mold material. This skill efficiently cools down the 0.45-W consuming chip by 10-degree more than non-filled-up structure. The other indication shows removing the connection bridges and cutting out the substrate to make a room space for chip placement. With result shown, 50 % height and volume of MorPACK can be minimized and also reduce thermal resistance in out-plan direction.