采用双电平斩波技术的低噪声CMOS带隙基准发生器

Bingxing Wu, S. Ay
{"title":"采用双电平斩波技术的低噪声CMOS带隙基准发生器","authors":"Bingxing Wu, S. Ay","doi":"10.1109/WMED.2015.7093954","DOIUrl":null,"url":null,"abstract":"This paper presents a low-noise CMOS bandgap reference (BGR) circuit that uses two-level chopping technique to reduce errors caused by non-idealities of the OPAMP used in the design. Input referred offset voltage of the OPAMP is reduced on first level. On second level, OPAMP offset is further reduced along with the low-frequency 1/f noise caused by the input transistors of the two-stage Miller OPAMP. The design is fabricated in a 0.35μm 2P4M CMOS analog process. The proposed BGR was tested in a temperature chamber between -25oC and +125oC. Measurement results showed that the standard deviation of the BGR output voltage without chopping is 7 times higher than that of when chopping is enabled. The proposed two-level chopping technique is verified improving performance characteristics of conventional BGR circuit.","PeriodicalId":251088,"journal":{"name":"2015 IEEE Workshop on Microelectronics and Electron Devices (WMED)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Low-Noise CMOS Bandgap Reference Generator Using Two-Level Chopping Technique\",\"authors\":\"Bingxing Wu, S. Ay\",\"doi\":\"10.1109/WMED.2015.7093954\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a low-noise CMOS bandgap reference (BGR) circuit that uses two-level chopping technique to reduce errors caused by non-idealities of the OPAMP used in the design. Input referred offset voltage of the OPAMP is reduced on first level. On second level, OPAMP offset is further reduced along with the low-frequency 1/f noise caused by the input transistors of the two-stage Miller OPAMP. The design is fabricated in a 0.35μm 2P4M CMOS analog process. The proposed BGR was tested in a temperature chamber between -25oC and +125oC. Measurement results showed that the standard deviation of the BGR output voltage without chopping is 7 times higher than that of when chopping is enabled. The proposed two-level chopping technique is verified improving performance characteristics of conventional BGR circuit.\",\"PeriodicalId\":251088,\"journal\":{\"name\":\"2015 IEEE Workshop on Microelectronics and Electron Devices (WMED)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-03-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE Workshop on Microelectronics and Electron Devices (WMED)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/WMED.2015.7093954\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Workshop on Microelectronics and Electron Devices (WMED)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WMED.2015.7093954","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

摘要

本文提出了一种低噪声CMOS带隙参考电路(BGR),该电路采用两级斩波技术来降低设计中使用的OPAMP的非理想性引起的误差。OPAMP的输入参考偏置电压在第一级降低。在第二级,OPAMP偏移量随着两级米勒OPAMP输入晶体管引起的低频1/f噪声进一步减小。该设计采用0.35μm 2P4M CMOS模拟工艺制作。所提出的BGR在-25℃至+125℃的温度室中进行了测试。测量结果表明,无斩波时BGR输出电压的标准差比使能斩波时高7倍。验证了所提出的双电平斩波技术改善了传统BGR电路的性能特性。
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Low-Noise CMOS Bandgap Reference Generator Using Two-Level Chopping Technique
This paper presents a low-noise CMOS bandgap reference (BGR) circuit that uses two-level chopping technique to reduce errors caused by non-idealities of the OPAMP used in the design. Input referred offset voltage of the OPAMP is reduced on first level. On second level, OPAMP offset is further reduced along with the low-frequency 1/f noise caused by the input transistors of the two-stage Miller OPAMP. The design is fabricated in a 0.35μm 2P4M CMOS analog process. The proposed BGR was tested in a temperature chamber between -25oC and +125oC. Measurement results showed that the standard deviation of the BGR output voltage without chopping is 7 times higher than that of when chopping is enabled. The proposed two-level chopping technique is verified improving performance characteristics of conventional BGR circuit.
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