E. Salman, E. Friedman, Ali Dasdan, F. Taraporevala, Kayhan Küçükçakar
{"title":"使用相互依赖的设置和保持时间减少静态定时分析中的悲观情绪","authors":"E. Salman, E. Friedman, Ali Dasdan, F. Taraporevala, Kayhan Küçükçakar","doi":"10.1109/ISQED.2006.100","DOIUrl":null,"url":null,"abstract":"A methodology is proposed for interdependent setup time and hold time characterization of sequential circuits. Integrating the methodology into an industrial sign-off static timing analysis tool is described. The proposed methodology prevents optimism and reduces unnecessary pessimism, both of which exist due to independent characterization. Furthermore, the tradeoff between interdependent setup and hold times is exploited to significantly reduce slack violations. These benefits are validated using industrial circuits and tools","PeriodicalId":138839,"journal":{"name":"7th International Symposium on Quality Electronic Design (ISQED'06)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-03-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"29","resultStr":"{\"title\":\"Pessimism reduction in static timing analysis using interdependent setup and hold times\",\"authors\":\"E. Salman, E. Friedman, Ali Dasdan, F. Taraporevala, Kayhan Küçükçakar\",\"doi\":\"10.1109/ISQED.2006.100\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A methodology is proposed for interdependent setup time and hold time characterization of sequential circuits. Integrating the methodology into an industrial sign-off static timing analysis tool is described. The proposed methodology prevents optimism and reduces unnecessary pessimism, both of which exist due to independent characterization. Furthermore, the tradeoff between interdependent setup and hold times is exploited to significantly reduce slack violations. These benefits are validated using industrial circuits and tools\",\"PeriodicalId\":138839,\"journal\":{\"name\":\"7th International Symposium on Quality Electronic Design (ISQED'06)\",\"volume\":\"16 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-03-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"29\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"7th International Symposium on Quality Electronic Design (ISQED'06)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISQED.2006.100\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"7th International Symposium on Quality Electronic Design (ISQED'06)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2006.100","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Pessimism reduction in static timing analysis using interdependent setup and hold times
A methodology is proposed for interdependent setup time and hold time characterization of sequential circuits. Integrating the methodology into an industrial sign-off static timing analysis tool is described. The proposed methodology prevents optimism and reduces unnecessary pessimism, both of which exist due to independent characterization. Furthermore, the tradeoff between interdependent setup and hold times is exploited to significantly reduce slack violations. These benefits are validated using industrial circuits and tools