{"title":"“Venice:数据中心服务器的经济高效架构”","authors":"Rui Hou","doi":"10.1109/SOCC.2015.7406895","DOIUrl":null,"url":null,"abstract":"Dr. Rui Hou is VP, Processor Design, of Suzhou PowerCore Technology. He received his Bachelor's and Master's degree in computer science from Harbin Institute of Technology in 1999 and 2003 respectively, and earned his Ph.D in computer science from the Institute of Computing Technology of the Chinese Academy of Sciences in 2007. His main research interests are in the areas of data center systems and high-performance CPUs. Dr. Hou is currently leading a team to develop a high performance server processor based on IBM's Power technology. He has led the design and development of an ARMv8 based many-core processor with a brand-new SMT-4 core that his team designed from the scratch. He has built prototypes systems enabling efficient resource sharing and high throughput computing inside the data centers. Dr. Hou is also an associate professor at Institute of Computing Technology. Before joining ICT in 2011, he had been working at IBM China Research Lab for four years. He has published over 20 peer-reviewed papers in various international conferences and journals, and filed more than 50 patent applications.","PeriodicalId":329464,"journal":{"name":"2015 28th IEEE International System-on-Chip Conference (SOCC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"\\\"Venice: A cost-effective architecture for datacenter servers\\\"\",\"authors\":\"Rui Hou\",\"doi\":\"10.1109/SOCC.2015.7406895\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Dr. Rui Hou is VP, Processor Design, of Suzhou PowerCore Technology. He received his Bachelor's and Master's degree in computer science from Harbin Institute of Technology in 1999 and 2003 respectively, and earned his Ph.D in computer science from the Institute of Computing Technology of the Chinese Academy of Sciences in 2007. His main research interests are in the areas of data center systems and high-performance CPUs. Dr. Hou is currently leading a team to develop a high performance server processor based on IBM's Power technology. He has led the design and development of an ARMv8 based many-core processor with a brand-new SMT-4 core that his team designed from the scratch. He has built prototypes systems enabling efficient resource sharing and high throughput computing inside the data centers. Dr. Hou is also an associate professor at Institute of Computing Technology. Before joining ICT in 2011, he had been working at IBM China Research Lab for four years. He has published over 20 peer-reviewed papers in various international conferences and journals, and filed more than 50 patent applications.\",\"PeriodicalId\":329464,\"journal\":{\"name\":\"2015 28th IEEE International System-on-Chip Conference (SOCC)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 28th IEEE International System-on-Chip Conference (SOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2015.7406895\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 28th IEEE International System-on-Chip Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2015.7406895","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
"Venice: A cost-effective architecture for datacenter servers"
Dr. Rui Hou is VP, Processor Design, of Suzhou PowerCore Technology. He received his Bachelor's and Master's degree in computer science from Harbin Institute of Technology in 1999 and 2003 respectively, and earned his Ph.D in computer science from the Institute of Computing Technology of the Chinese Academy of Sciences in 2007. His main research interests are in the areas of data center systems and high-performance CPUs. Dr. Hou is currently leading a team to develop a high performance server processor based on IBM's Power technology. He has led the design and development of an ARMv8 based many-core processor with a brand-new SMT-4 core that his team designed from the scratch. He has built prototypes systems enabling efficient resource sharing and high throughput computing inside the data centers. Dr. Hou is also an associate professor at Institute of Computing Technology. Before joining ICT in 2011, he had been working at IBM China Research Lab for four years. He has published over 20 peer-reviewed papers in various international conferences and journals, and filed more than 50 patent applications.
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