M. Collados, Hongli Zhang, B. Tenbroek, Hsiang-Hui Chang
{"title":"40nm CMOS低电流数字预失真3G-4G发射机","authors":"M. Collados, Hongli Zhang, B. Tenbroek, Hsiang-Hui Chang","doi":"10.1109/RFIC.2013.6569544","DOIUrl":null,"url":null,"abstract":"To create a wide-band transmit path with high current efficiency a single-balanced passive modulator is combined with a class-B single-ended resonant driver. The linearity of such configuration is limited by a strong 3rd harmonic response of the modulator combined with a strong third-order intermodulation in the driver. A novel digital predistortion approach is presented to enable good linearity under these highly non-linear conditions. Implemented in 40nm CMOS, the modulator and driver combined consume only 45mW to deliver a +3dBm Release 99 WCDMA signal with 1.1% EVM, -54dBc ACLR and -160dBc/Hz noise in the RX band. The ACLR remains below -50dBc over temperature, frequency and TX-power without adjustment of the predistortion coefficients. The transmitter delivers +0dBm 10MHz LTE with -51dBc ACLR.","PeriodicalId":203521,"journal":{"name":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A low-current digitally predistorted 3G-4G transmitter in 40nm CMOS\",\"authors\":\"M. Collados, Hongli Zhang, B. Tenbroek, Hsiang-Hui Chang\",\"doi\":\"10.1109/RFIC.2013.6569544\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To create a wide-band transmit path with high current efficiency a single-balanced passive modulator is combined with a class-B single-ended resonant driver. The linearity of such configuration is limited by a strong 3rd harmonic response of the modulator combined with a strong third-order intermodulation in the driver. A novel digital predistortion approach is presented to enable good linearity under these highly non-linear conditions. Implemented in 40nm CMOS, the modulator and driver combined consume only 45mW to deliver a +3dBm Release 99 WCDMA signal with 1.1% EVM, -54dBc ACLR and -160dBc/Hz noise in the RX band. The ACLR remains below -50dBc over temperature, frequency and TX-power without adjustment of the predistortion coefficients. The transmitter delivers +0dBm 10MHz LTE with -51dBc ACLR.\",\"PeriodicalId\":203521,\"journal\":{\"name\":\"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-06-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2013.6569544\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2013.6569544","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low-current digitally predistorted 3G-4G transmitter in 40nm CMOS
To create a wide-band transmit path with high current efficiency a single-balanced passive modulator is combined with a class-B single-ended resonant driver. The linearity of such configuration is limited by a strong 3rd harmonic response of the modulator combined with a strong third-order intermodulation in the driver. A novel digital predistortion approach is presented to enable good linearity under these highly non-linear conditions. Implemented in 40nm CMOS, the modulator and driver combined consume only 45mW to deliver a +3dBm Release 99 WCDMA signal with 1.1% EVM, -54dBc ACLR and -160dBc/Hz noise in the RX band. The ACLR remains below -50dBc over temperature, frequency and TX-power without adjustment of the predistortion coefficients. The transmitter delivers +0dBm 10MHz LTE with -51dBc ACLR.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
