在1.8 V, 0.25 /spl mu/m SOI技术下高性能动态寄存器文件的频率依赖行为

1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345) Pub Date : 1900-01-01 DOI:10.1109/SOI.1999.819862

R. Joshi, W. Hwang, S.C. Wilson, G. Shahidi, C. Chuang

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引用次数: 0

摘要

只提供摘要形式。在高性能微处理器的固定或浮点单元中，高性能寄存器文件是必不可少的。本文讨论了动态寄存器文件的访问时间和脉宽的频率依赖行为，以及在1.8 V, 0.25 /spl mu/m部分耗尽(PD) SOI技术下实现鲁棒工作的电路技术。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Frequency dependent behavior of a high performance dynamic register file in 1.8 V, 0.25 /spl mu/m SOI technology

Summary form only given. High performance register files are essential in fixed or floating point units of a high performance microprocessor. In this paper, the frequency dependent behavior of access time and pulse width of the dynamic register file and the circuit techniques to achieve robust operation in 1.8 V, 0.25 /spl mu/m partially depleted (PD) SOI technology are addressed.

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1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345)

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