{"title":"STT-MRAM和NV-Logic用于低功率系统","authors":"T. Endoh","doi":"10.1109/E3S.2013.6705864","DOIUrl":null,"url":null,"abstract":"Recently in semiconductor memories, it is becoming difficult to meet the target performance requirements by technology development based solely on device scaling. Especially, due to the increase in memory capacity, increased operation speed and increased leakage current of MOSFET, the power consumption of LSI is rapidly increasing.","PeriodicalId":231837,"journal":{"name":"2013 Third Berkeley Symposium on Energy Efficient Electronic Systems (E3S)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"STT-MRAM and NV-Logic for low power systems\",\"authors\":\"T. Endoh\",\"doi\":\"10.1109/E3S.2013.6705864\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Recently in semiconductor memories, it is becoming difficult to meet the target performance requirements by technology development based solely on device scaling. Especially, due to the increase in memory capacity, increased operation speed and increased leakage current of MOSFET, the power consumption of LSI is rapidly increasing.\",\"PeriodicalId\":231837,\"journal\":{\"name\":\"2013 Third Berkeley Symposium on Energy Efficient Electronic Systems (E3S)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 Third Berkeley Symposium on Energy Efficient Electronic Systems (E3S)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/E3S.2013.6705864\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Third Berkeley Symposium on Energy Efficient Electronic Systems (E3S)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/E3S.2013.6705864","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Recently in semiconductor memories, it is becoming difficult to meet the target performance requirements by technology development based solely on device scaling. Especially, due to the increase in memory capacity, increased operation speed and increased leakage current of MOSFET, the power consumption of LSI is rapidly increasing.