{"title":"在扩展和超越cmos结构上实现节能推理引擎架构的路径","authors":"Ashkan Borna, M. Takamiya, J. Rabaey","doi":"10.1109/E3S.2013.6705861","DOIUrl":null,"url":null,"abstract":"Moore's law, the driving force behind the semiconductor for the past decades, is endangered from several angles. Artifacts of scaled dimensions, yield, reliability, fabrication cost and device performance degradation all raise legitimate concerns about current trends of mere transferring same architectures to more advanced substrates.","PeriodicalId":231837,"journal":{"name":"2013 Third Berkeley Symposium on Energy Efficient Electronic Systems (E3S)","volume":"132 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The path toward energy-efficient inference engine architectures on scaled and beyond-CMOS fabrics\",\"authors\":\"Ashkan Borna, M. Takamiya, J. Rabaey\",\"doi\":\"10.1109/E3S.2013.6705861\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Moore's law, the driving force behind the semiconductor for the past decades, is endangered from several angles. Artifacts of scaled dimensions, yield, reliability, fabrication cost and device performance degradation all raise legitimate concerns about current trends of mere transferring same architectures to more advanced substrates.\",\"PeriodicalId\":231837,\"journal\":{\"name\":\"2013 Third Berkeley Symposium on Energy Efficient Electronic Systems (E3S)\",\"volume\":\"132 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 Third Berkeley Symposium on Energy Efficient Electronic Systems (E3S)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/E3S.2013.6705861\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Third Berkeley Symposium on Energy Efficient Electronic Systems (E3S)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/E3S.2013.6705861","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The path toward energy-efficient inference engine architectures on scaled and beyond-CMOS fabrics
Moore's law, the driving force behind the semiconductor for the past decades, is endangered from several angles. Artifacts of scaled dimensions, yield, reliability, fabrication cost and device performance degradation all raise legitimate concerns about current trends of mere transferring same architectures to more advanced substrates.