面向下个世纪的集成电路技术研发

Y. Nishi
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引用次数: 1

摘要

只提供摘要形式。随着我们经历了集成电路时代,更严格地说,是基于硅的CMOS集成电路,集成密度已经从一个芯片上的数百个晶体管增加到一个芯片上的近2.5亿个晶体管,一种发展技术本身的方式已经到了我们必须研究任何可能的新模式的地步。在美国、日本、欧洲、东南亚国家的联盟等论坛上讨论过的技术趋势现在正在合理地趋同,由于所谓的“技术驱动因素”的差异,存在一些差异。通用参数是最小几何形状,尽管它们越来越多地成为概念性参数,而不是在真正的芯片上找到的参数。显然,对于高密度存储器和高性能处理器来说,单位面积的有源元件密度和互连层数分别是更重要的参数。这次演讲的目的不是讨论技术趋势本身,而是研究我们是如何发展技术的,以及我们如何可能在未来继续发展。
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IC technology R&D for the next century
Summary form only given. As we have gone through the era of integrated circuits, more strictly silicon-based CMOS integrated circuits, where integration density has increased from hundreds of transistors on a chip to almost one quarter of a billion transistors on a chip, a way to develop technology itself has come to the point where we must examine any possible new model for research and development. Technology trends which have been well discussed in forums such as consortia in the USA, Japan, Europe, South-east Asian countries are now converging reasonably, with some differences due to the differences of so-called "technology drivers". Common parameters are the minimum geometries, though they have increasingly become more conceptual parameters as opposed to what can be found on a real chip. Obviously, the density of active elements per unit area and the number of interconnect layers are more important parameters for high-density memories and high performance processors, respectively. The purpose of this talk is not to discuss the technology trend itself, but to examine how we have developed technology and how we can possibly continue in the future.
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