{"title":"用于太阳能电池的多层横向SOI PIN光电二极管","authors":"F. A. da Silva, R. Doria, M. G. C. de Andrade","doi":"10.1109/SBMicro.2019.8919314","DOIUrl":null,"url":null,"abstract":"In this paper, a lateral PIN photodiode based on a SOI wafer has been studied through numerical simulations. This device can be used as a solar cell embedded in a CMOS circuit in order to propose autonomous ultralow-power circuits (ULP). Efficiency behavior has been analyzed for different semiconductor materials and configurations in order to reach the best performance. The results indicate that a layer with a different semiconductor, with different characteristics such as forbidden band, mobility and light absorption, improves the generated power in the device, suggesting that the cell can feed circuits that need larger power.","PeriodicalId":403446,"journal":{"name":"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Multi-layers Lateral SOI PIN Photodiodes for Solar Cells Applications\",\"authors\":\"F. A. da Silva, R. Doria, M. G. C. de Andrade\",\"doi\":\"10.1109/SBMicro.2019.8919314\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a lateral PIN photodiode based on a SOI wafer has been studied through numerical simulations. This device can be used as a solar cell embedded in a CMOS circuit in order to propose autonomous ultralow-power circuits (ULP). Efficiency behavior has been analyzed for different semiconductor materials and configurations in order to reach the best performance. The results indicate that a layer with a different semiconductor, with different characteristics such as forbidden band, mobility and light absorption, improves the generated power in the device, suggesting that the cell can feed circuits that need larger power.\",\"PeriodicalId\":403446,\"journal\":{\"name\":\"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SBMicro.2019.8919314\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SBMicro.2019.8919314","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Multi-layers Lateral SOI PIN Photodiodes for Solar Cells Applications
In this paper, a lateral PIN photodiode based on a SOI wafer has been studied through numerical simulations. This device can be used as a solar cell embedded in a CMOS circuit in order to propose autonomous ultralow-power circuits (ULP). Efficiency behavior has been analyzed for different semiconductor materials and configurations in order to reach the best performance. The results indicate that a layer with a different semiconductor, with different characteristics such as forbidden band, mobility and light absorption, improves the generated power in the device, suggesting that the cell can feed circuits that need larger power.
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