一种加权公平排队整理标签计算体系结构与实现

IEEE International SOC Conference, 2004. Proceedings. Pub Date : 2004-11-30 DOI:10.1109/SOCC.2004.1362431

Colm McKillen, S. Sezer

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引用次数: 6

摘要

本文研究了Xilinx Virtex Pro板的加权公平排队(WFQ)标签调度程序的定制实现，该调度程序具有在100MHz以上服务8,000个单独会话的能力。该实现实际上能够处理多达64,000个不同的会话，只需要使用最小尺寸的FPGA。这对下一代太比特路由器来说是一个很好的硬件成本。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A weighted fair queuing finishing tag computation architecture and implementation

This paper investigates a customized implementation for Xilinx Virtex Pro board of a weighted fair queuing (WFQ) tag scheduler that has the capacity to serve 8,000 individual sessions at over 100MHz. The implementation is actually capable of handling up to 64,000 different sessions requiring only the use of a minimal size FPGA. This represents an excellent hardware cost for a next generation terabit router.

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IEEE International SOC Conference, 2004. Proceedings.

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