接近多层次NAND闪存存储效率的信息理论边界

Shu Li, Tong Zhang
{"title":"接近多层次NAND闪存存储效率的信息理论边界","authors":"Shu Li, Tong Zhang","doi":"10.1109/IMW.2009.5090580","DOIUrl":null,"url":null,"abstract":"This paper applies information theory to formulate and estimate the NAND flash memory storage efficiency bound, and shows a big gap between the theoretical bound and what is achievable today. We further present two techniques to reduce the gap and demonstrate their promising potential using 2 bits/cell NAND flash memories as a test vehicle.","PeriodicalId":113507,"journal":{"name":"2009 IEEE International Memory Workshop","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Approaching the Information Theoretical Bound of Multi-Level NAND Flash Memory Storage Efficiency\",\"authors\":\"Shu Li, Tong Zhang\",\"doi\":\"10.1109/IMW.2009.5090580\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper applies information theory to formulate and estimate the NAND flash memory storage efficiency bound, and shows a big gap between the theoretical bound and what is achievable today. We further present two techniques to reduce the gap and demonstrate their promising potential using 2 bits/cell NAND flash memories as a test vehicle.\",\"PeriodicalId\":113507,\"journal\":{\"name\":\"2009 IEEE International Memory Workshop\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-05-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE International Memory Workshop\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMW.2009.5090580\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE International Memory Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMW.2009.5090580","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

本文运用信息论对NAND闪存存储效率边界进行了制定和估计,结果表明,该理论边界与目前可实现的边界存在较大差距。我们进一步提出了两种技术来缩小差距,并展示了它们的潜力,使用2位/单元NAND闪存作为测试载体。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Approaching the Information Theoretical Bound of Multi-Level NAND Flash Memory Storage Efficiency
This paper applies information theory to formulate and estimate the NAND flash memory storage efficiency bound, and shows a big gap between the theoretical bound and what is achievable today. We further present two techniques to reduce the gap and demonstrate their promising potential using 2 bits/cell NAND flash memories as a test vehicle.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Chip Level Reliability of MANOS Cells under Operating Conditions Low Temperature Rectifying Junctions for Crossbar Non-Volatile Memory Devices 16Mb Split Gate Flash Memory with Improved Process Window Thin Layers Obtained by Plasma Process for Emerging Non-Volatile Memory (RRAM) Applications Both NOR and NAND Embedded Hybrid Flash for S-SIM Application Using 90 nm Process Technology
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1