{"title":"混合- wsi大规模并行计算模块的成本建模","authors":"C. Habiger, R. Lea","doi":"10.1109/ICWSI.1993.255268","DOIUrl":null,"url":null,"abstract":"Hybrid wafer scale integration (HWSI) is a promising technology for the cost-effective development of the next generation of massively parallel computers (MPCs). It is argued that it is not easy to understand the relative merits and technological tradeoffs associated with vendor-specific factors in order to determine the best technological route for a particular application. Cost models aimed at the resolution of these problems are introduced, and progress towards a design methodology for HWSI devices is reported.<<ETX>>","PeriodicalId":377227,"journal":{"name":"1993 Proceedings Fifth Annual IEEE International Conference on Wafer Scale Integration","volume":"125 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-01-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Cost modelling for hybrid-WSI massively parallel computing modules\",\"authors\":\"C. Habiger, R. Lea\",\"doi\":\"10.1109/ICWSI.1993.255268\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Hybrid wafer scale integration (HWSI) is a promising technology for the cost-effective development of the next generation of massively parallel computers (MPCs). It is argued that it is not easy to understand the relative merits and technological tradeoffs associated with vendor-specific factors in order to determine the best technological route for a particular application. Cost models aimed at the resolution of these problems are introduced, and progress towards a design methodology for HWSI devices is reported.<<ETX>>\",\"PeriodicalId\":377227,\"journal\":{\"name\":\"1993 Proceedings Fifth Annual IEEE International Conference on Wafer Scale Integration\",\"volume\":\"125 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-01-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1993 Proceedings Fifth Annual IEEE International Conference on Wafer Scale Integration\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICWSI.1993.255268\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1993 Proceedings Fifth Annual IEEE International Conference on Wafer Scale Integration","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICWSI.1993.255268","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Cost modelling for hybrid-WSI massively parallel computing modules
Hybrid wafer scale integration (HWSI) is a promising technology for the cost-effective development of the next generation of massively parallel computers (MPCs). It is argued that it is not easy to understand the relative merits and technological tradeoffs associated with vendor-specific factors in order to determine the best technological route for a particular application. Cost models aimed at the resolution of these problems are introduced, and progress towards a design methodology for HWSI devices is reported.<>
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