H. Tseng, M. Ramón, L. Hebert, P. Tobin, D. Triyoso, S. Kalpat, J. Grant, Z.X. Jiang, D. Gilmer, D. Menke, W. Taylor, O. Adetutu, B. White
{"title":"阈值电压不稳定和等离子体诱导的多晶硅/HfO/sub - 2/器件损伤——氘掺入的积极影响","authors":"H. Tseng, M. Ramón, L. Hebert, P. Tobin, D. Triyoso, S. Kalpat, J. Grant, Z.X. Jiang, D. Gilmer, D. Menke, W. Taylor, O. Adetutu, B. White","doi":"10.1109/ICICDT.2004.1309957","DOIUrl":null,"url":null,"abstract":"Device instability is one of the most challenging issues to implement High-K gate dielectric. Incorporation of deuterium during the ALD process effectively improves the interface quality that enhances High-K device stability and reliability. Compared to H/sub 2/O processed HfO/sub 2/ devices, devices with D/sub 2/O processing result in a significantly smaller Vt shift after constant voltage stressing at room temperature and at 125/spl deg/C under NBTI/PBTI conditions, as well as a longer CHCI lifetime. This process is independent of transistor process integration and is relatively low cost. It has the potential to become an industry standard if ALD High-K gate dielectric processing is the final choice.","PeriodicalId":158994,"journal":{"name":"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Threshold voltage instability and plasma induced damage of polySi/HfO/sub 2/ devices - positive impact of deuterium incorporation\",\"authors\":\"H. Tseng, M. Ramón, L. Hebert, P. Tobin, D. Triyoso, S. Kalpat, J. Grant, Z.X. Jiang, D. Gilmer, D. Menke, W. Taylor, O. Adetutu, B. White\",\"doi\":\"10.1109/ICICDT.2004.1309957\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Device instability is one of the most challenging issues to implement High-K gate dielectric. Incorporation of deuterium during the ALD process effectively improves the interface quality that enhances High-K device stability and reliability. Compared to H/sub 2/O processed HfO/sub 2/ devices, devices with D/sub 2/O processing result in a significantly smaller Vt shift after constant voltage stressing at room temperature and at 125/spl deg/C under NBTI/PBTI conditions, as well as a longer CHCI lifetime. This process is independent of transistor process integration and is relatively low cost. It has the potential to become an industry standard if ALD High-K gate dielectric processing is the final choice.\",\"PeriodicalId\":158994,\"journal\":{\"name\":\"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-10-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICDT.2004.1309957\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICDT.2004.1309957","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Threshold voltage instability and plasma induced damage of polySi/HfO/sub 2/ devices - positive impact of deuterium incorporation
Device instability is one of the most challenging issues to implement High-K gate dielectric. Incorporation of deuterium during the ALD process effectively improves the interface quality that enhances High-K device stability and reliability. Compared to H/sub 2/O processed HfO/sub 2/ devices, devices with D/sub 2/O processing result in a significantly smaller Vt shift after constant voltage stressing at room temperature and at 125/spl deg/C under NBTI/PBTI conditions, as well as a longer CHCI lifetime. This process is independent of transistor process integration and is relatively low cost. It has the potential to become an industry standard if ALD High-K gate dielectric processing is the final choice.