Mohamed Boumalkha, Mohammed Lahsaini, Hafid Griguer, Otman El Mrabet, Taj Eddin Elhamadi, Moulay El Hassane Archidi, Jamal EL Aoufi, Mohamed Taouzari
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引用次数: 0
摘要
摘要 本文介绍了用于 6 GHz 以下 5G 通信系统的微带技术微波低噪声放大器(LNA)的设计策略。利用微带耦合器设计直流块,以避免块状元件产生不必要的寄生效应,并方便制造。偏置和匹配网络使用微带传输线实现。根据设计的电路,使用安捷伦科技(hp)® ATF13786 场效应晶体管制作并测量了原型。在 3.5 GHz 频率下对所提出的低噪声放大器进行了模拟和测量。结果表明,拟议的 LNA 实现了 12.7 dB 的高增益、小于 2 dB 的噪声系数、小于 -10 dB 的输入和输出反射系数以及在所需带宽上的无条件稳定性。在大信号结果方面,拟议的 LNA 性能卓越,输出功率达 16.4 dBm,功率附加效率 (PAE) 为 18%。此外,拟议的 LNA 还具有良好的线性度,1 dB 时的输出压缩点(OP1dB)为 0 dBm,三阶截取点(OIP3)大于 +37.7 dBm。
Implementation of an LNA Using a Microstrip Coupler as a DC-Block for Sub-6 5G Communication Systems
Abstract
This paper presents the design strategy of a microwave low noise amplifier (LNA) in microstrip technology for sub-6 GHz 5G communication systems. A microstrip coupler is exploited to design a DC block in order to avoid unwanted parasitic effects generated by lumped elements and to facilitate fabrication. Bias and matching networks are implemented using microstrip transmission lines. Based on the designed circuit, a prototype is fabricated and measured using an Agilent Technologies (hp)® ATF13786 field effect transistor. The proposed LNA is simulated and measured at 3.5 GHz. The results demonstrate that the proposed LNA achieves high gain of 12.7 dB, noise figure less than 2 dB, input and output reflection coefficients less than –10 dB, and unconditional stability over the desired bandwidth. Regarding the large signal results, the proposed LNA yields excellent performance with an output power of 16.4 dBm, and a power added efficiency (PAE) of 18%. Furthermore, the proposed LNA exhibits good linearity with an output compression point at 1 dB (OP1dB) of 0 dBm, and a third-order intercept point (OIP3) greater than +37.7 dBm.
期刊介绍:
Russian Microelectronics covers physical, technological, and some VLSI and ULSI circuit-technical aspects of microelectronics and nanoelectronics; it informs the reader of new trends in submicron optical, x-ray, electron, and ion-beam lithography technology; dry processing techniques, etching, doping; and deposition and planarization technology. Significant space is devoted to problems arising in the application of proton, electron, and ion beams, plasma, etc. Consideration is given to new equipment, including cluster tools and control in situ and submicron CMOS, bipolar, and BICMOS technologies. The journal publishes papers addressing problems of molecular beam epitaxy and related processes; heterojunction devices and integrated circuits; the technology and devices of nanoelectronics; and the fabrication of nanometer scale devices, including new device structures, quantum-effect devices, and superconducting devices. The reader will find papers containing news of the diagnostics of surfaces and microelectronic structures, the modeling of technological processes and devices in micro- and nanoelectronics, including nanotransistors, and solid state qubits.