A fully digital timing background calibration algorithm based on first-order auto-correlation for time-interleaved ADCs

This paper presents a fully digital background calibration method for time-interleaved (TI) analog-to-digital converters (ADCs). The timing detector employs a timing detection method based on an enhanced autocorrelation function, combined with matrix operations, to improve the accuracy of timing mismatch acquisition. The algorithm makes full use of the autocorrelation functions of each channel and proposes a more precise method for obtaining autocorrelation derivatives. Furthermore, the algorithm features a simple structure, low computational complexity, and can support timing calibration for any number of channels without requiring additional channels. The algorithm was validated using an ADC + FPGA combined system, with a 8-channel TI-ADC manufactured in 28 nm technology and a sampling rate of 20 GS/s. Results demonstrate that compared to the uncalibrated state, the algorithm significantly improves the SNDR and SFDR from 27.98 dB and 30.76 dB to 39.38 dB and 42.13 dB, respectively when the inputs are near the Nyquist frequency.