{"title":"基于线性度和噪声评估的扩展源异质结双栅极隧道场效应晶体管分析","authors":"","doi":"10.1016/j.micrna.2024.207939","DOIUrl":null,"url":null,"abstract":"<div><p>This research work evaluates a performance analysis of heterostructure (SiGe/Si) double gate extended source Tunnel FET (Hetero-ES-TFET) to enhance the analog performance, linearity and noise performance. At the source-channel junction, a Hetero-ES-TFET's source is extended into the channel to increase point and line tunneling in the device. The Hetero-ES-TFET exhibits a high <em>I</em><sub><em>ON</em></sub><em>/I</em><sub><em>OFF</em></sub> of 3.57 × 10<sup>12</sup> and a maximum cut off frequency <em>f</em><sub><em>T</em></sub> of 54.19 GHz for optimization of device structural parameters. This analysis is conducted using a calibrated SILVACO, technology computer-aided design (TCAD) simulator. The proposed structure includes evaluation of linearity and noise performance characteristics. Furthermore, a linearity analysis as a figure of merit was conducted for the proposed device under study, including different parameters such as 3<sup>rd</sup> order intermodulation distortion point (IMD<sub>3</sub>), 3<sup>rd</sup> order intermodulation intercept point (IIP<sub>3</sub>), 2<sup>nd</sup> and 3<sup>rd</sup> order voltage intercept point (VIP<sub>2</sub> and VIP<sub>3</sub>). The proposed Hetero-ES-TFET has achieved an incredibly high ON current and low threshold voltage. The effect of increasing source width has been examined in this work while sub-threshold swing (SS) remains unchanged during the analysis. There is an improvement in threshold voltage and <em>I</em><sub><em>ON</em></sub><em>/I</em><sub><em>OFF</em></sub> value by using silicon-germanium (SiGe) as a source material.</p></div>","PeriodicalId":100923,"journal":{"name":"Micro and Nanostructures","volume":null,"pages":null},"PeriodicalIF":2.7000,"publicationDate":"2024-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Linearity and noise evaluation based analysis of extended source heterojunction double gate tunnel FET\",\"authors\":\"\",\"doi\":\"10.1016/j.micrna.2024.207939\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>This research work evaluates a performance analysis of heterostructure (SiGe/Si) double gate extended source Tunnel FET (Hetero-ES-TFET) to enhance the analog performance, linearity and noise performance. At the source-channel junction, a Hetero-ES-TFET's source is extended into the channel to increase point and line tunneling in the device. The Hetero-ES-TFET exhibits a high <em>I</em><sub><em>ON</em></sub><em>/I</em><sub><em>OFF</em></sub> of 3.57 × 10<sup>12</sup> and a maximum cut off frequency <em>f</em><sub><em>T</em></sub> of 54.19 GHz for optimization of device structural parameters. This analysis is conducted using a calibrated SILVACO, technology computer-aided design (TCAD) simulator. The proposed structure includes evaluation of linearity and noise performance characteristics. Furthermore, a linearity analysis as a figure of merit was conducted for the proposed device under study, including different parameters such as 3<sup>rd</sup> order intermodulation distortion point (IMD<sub>3</sub>), 3<sup>rd</sup> order intermodulation intercept point (IIP<sub>3</sub>), 2<sup>nd</sup> and 3<sup>rd</sup> order voltage intercept point (VIP<sub>2</sub> and VIP<sub>3</sub>). The proposed Hetero-ES-TFET has achieved an incredibly high ON current and low threshold voltage. The effect of increasing source width has been examined in this work while sub-threshold swing (SS) remains unchanged during the analysis. There is an improvement in threshold voltage and <em>I</em><sub><em>ON</em></sub><em>/I</em><sub><em>OFF</em></sub> value by using silicon-germanium (SiGe) as a source material.</p></div>\",\"PeriodicalId\":100923,\"journal\":{\"name\":\"Micro and Nanostructures\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":2.7000,\"publicationDate\":\"2024-07-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Micro and Nanostructures\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S2773012324001882\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"PHYSICS, CONDENSED MATTER\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Micro and Nanostructures","FirstCategoryId":"1085","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S2773012324001882","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"PHYSICS, CONDENSED MATTER","Score":null,"Total":0}
Linearity and noise evaluation based analysis of extended source heterojunction double gate tunnel FET
This research work evaluates a performance analysis of heterostructure (SiGe/Si) double gate extended source Tunnel FET (Hetero-ES-TFET) to enhance the analog performance, linearity and noise performance. At the source-channel junction, a Hetero-ES-TFET's source is extended into the channel to increase point and line tunneling in the device. The Hetero-ES-TFET exhibits a high ION/IOFF of 3.57 × 1012 and a maximum cut off frequency fT of 54.19 GHz for optimization of device structural parameters. This analysis is conducted using a calibrated SILVACO, technology computer-aided design (TCAD) simulator. The proposed structure includes evaluation of linearity and noise performance characteristics. Furthermore, a linearity analysis as a figure of merit was conducted for the proposed device under study, including different parameters such as 3rd order intermodulation distortion point (IMD3), 3rd order intermodulation intercept point (IIP3), 2nd and 3rd order voltage intercept point (VIP2 and VIP3). The proposed Hetero-ES-TFET has achieved an incredibly high ON current and low threshold voltage. The effect of increasing source width has been examined in this work while sub-threshold swing (SS) remains unchanged during the analysis. There is an improvement in threshold voltage and ION/IOFF value by using silicon-germanium (SiGe) as a source material.