{"title":"垂直堆叠DRAM用SiGe/Si超晶格的生长与表征","authors":"Hailing Wang, Xiangsheng Wang, Yanpeng Song, Xiaomeng Liu, Ying Zhang, Xinyou Liu, Guilei Wang, Chao Zhao","doi":"10.1007/s10854-024-14167-y","DOIUrl":null,"url":null,"abstract":"<div><p>In this study, SiGe/Si superlattices films (SLs) with different tiers were epitaxially grown by reduced pressure chemical vapor deposition (RPCVD) on 300 mm Si (001) substrate. Crystal quality of SiGe/Si SLs films (relaxation, surface roughness, interface characteristics and dislocation density) were quantitative evaluated by various characterization methods. A systematic investigation was conducted on the transition process of the SiGe/Si SLs films from full strain to relaxation state with increasing stacking layers. And, the variation trend of dislocation density and surface roughness with increasing stacking layers is studied. Additionally, we examined the changes in crystal quality and dislocation density of these SLs films after thermal annealing (20 min, @700 °C), and all the films exhibit higher strain relaxation by generating more misfit dislocations propagating in-plane. This study provides guidance and reference for the regulation of process parameters and the design of superlattice structure in vertically stacked DRAM.</p></div>","PeriodicalId":646,"journal":{"name":"Journal of Materials Science: Materials in Electronics","volume":"36 2","pages":""},"PeriodicalIF":2.8000,"publicationDate":"2025-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Growth and characterization of SiGe/Si superlattice for vertically stacked DRAM\",\"authors\":\"Hailing Wang, Xiangsheng Wang, Yanpeng Song, Xiaomeng Liu, Ying Zhang, Xinyou Liu, Guilei Wang, Chao Zhao\",\"doi\":\"10.1007/s10854-024-14167-y\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>In this study, SiGe/Si superlattices films (SLs) with different tiers were epitaxially grown by reduced pressure chemical vapor deposition (RPCVD) on 300 mm Si (001) substrate. Crystal quality of SiGe/Si SLs films (relaxation, surface roughness, interface characteristics and dislocation density) were quantitative evaluated by various characterization methods. A systematic investigation was conducted on the transition process of the SiGe/Si SLs films from full strain to relaxation state with increasing stacking layers. And, the variation trend of dislocation density and surface roughness with increasing stacking layers is studied. Additionally, we examined the changes in crystal quality and dislocation density of these SLs films after thermal annealing (20 min, @700 °C), and all the films exhibit higher strain relaxation by generating more misfit dislocations propagating in-plane. This study provides guidance and reference for the regulation of process parameters and the design of superlattice structure in vertically stacked DRAM.</p></div>\",\"PeriodicalId\":646,\"journal\":{\"name\":\"Journal of Materials Science: Materials in Electronics\",\"volume\":\"36 2\",\"pages\":\"\"},\"PeriodicalIF\":2.8000,\"publicationDate\":\"2025-01-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Materials Science: Materials in Electronics\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://link.springer.com/article/10.1007/s10854-024-14167-y\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Materials Science: Materials in Electronics","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10854-024-14167-y","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
摘要
在本研究中,采用减压化学气相沉积(RPCVD)方法在300 mm Si(001)衬底上外延生长了不同层数的SiGe/Si超晶格薄膜(SLs)。采用各种表征方法定量评价了SiGe/Si SLs薄膜的晶体质量(弛豫、表面粗糙度、界面特性和位错密度)。系统地研究了随着层数的增加,SiGe/Si SLs薄膜从全应变到松弛状态的转变过程。研究了位错密度和表面粗糙度随层数增加的变化趋势。此外,我们检测了这些SLs薄膜在加热退火(20 min, @700°C)后晶体质量和位错密度的变化,所有薄膜都表现出更高的应变弛豫,产生更多的面内传播的错配位错。该研究为垂直堆叠DRAM的工艺参数调控和超晶格结构设计提供了指导和参考。
Growth and characterization of SiGe/Si superlattice for vertically stacked DRAM
In this study, SiGe/Si superlattices films (SLs) with different tiers were epitaxially grown by reduced pressure chemical vapor deposition (RPCVD) on 300 mm Si (001) substrate. Crystal quality of SiGe/Si SLs films (relaxation, surface roughness, interface characteristics and dislocation density) were quantitative evaluated by various characterization methods. A systematic investigation was conducted on the transition process of the SiGe/Si SLs films from full strain to relaxation state with increasing stacking layers. And, the variation trend of dislocation density and surface roughness with increasing stacking layers is studied. Additionally, we examined the changes in crystal quality and dislocation density of these SLs films after thermal annealing (20 min, @700 °C), and all the films exhibit higher strain relaxation by generating more misfit dislocations propagating in-plane. This study provides guidance and reference for the regulation of process parameters and the design of superlattice structure in vertically stacked DRAM.
期刊介绍:
The Journal of Materials Science: Materials in Electronics is an established refereed companion to the Journal of Materials Science. It publishes papers on materials and their applications in modern electronics, covering the ground between fundamental science, such as semiconductor physics, and work concerned specifically with applications. It explores the growth and preparation of new materials, as well as their processing, fabrication, bonding and encapsulation, together with the reliability, failure analysis, quality assurance and characterization related to the whole range of applications in electronics. The Journal presents papers in newly developing fields such as low dimensional structures and devices, optoelectronics including III-V compounds, glasses and linear/non-linear crystal materials and lasers, high Tc superconductors, conducting polymers, thick film materials and new contact technologies, as well as the established electronics device and circuit materials.