{"title":"连续时间流水线ADC:一种用于宽带数据转换的连续时间ADC","authors":"Hajime Shibata","doi":"10.1109/OJSSCS.2023.3313579","DOIUrl":null,"url":null,"abstract":"The continuous-time (CT) pipelined analog-to-digital converter (ADC) is an emerging ADC architecture suitable for wide- bandwidth (BW) digitization in fully integrated receiver applications. It inherits the integration-friendly features of CT \n<inline-formula> <tex-math>$\\Delta \\Sigma $ </tex-math></inline-formula>\n ADCs, such as inherent anti-aliasing, while achieving the wide- BW operation originating from discrete-time (DT) pipelined ADCs. In this review article, we introduce a gain-centric ADC model and apply the key criteria derived from the model to transform a DT pipelined ADC into a CT pipelined ADC. We then discuss the design considerations and essential building blocks of the CT pipelined ADC. Finally, we examine several implementations of this architecture with their highlights and challenges.","PeriodicalId":100633,"journal":{"name":"IEEE Open Journal of the Solid-State Circuits Society","volume":"3 ","pages":"162-173"},"PeriodicalIF":0.0000,"publicationDate":"2023-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/8782712/10019316/10246305.pdf","citationCount":"0","resultStr":"{\"title\":\"Continuous-Time Pipelined ADC: A Breed of Continuous-Time ADCs for Wideband Data Conversion\",\"authors\":\"Hajime Shibata\",\"doi\":\"10.1109/OJSSCS.2023.3313579\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The continuous-time (CT) pipelined analog-to-digital converter (ADC) is an emerging ADC architecture suitable for wide- bandwidth (BW) digitization in fully integrated receiver applications. It inherits the integration-friendly features of CT \\n<inline-formula> <tex-math>$\\\\Delta \\\\Sigma $ </tex-math></inline-formula>\\n ADCs, such as inherent anti-aliasing, while achieving the wide- BW operation originating from discrete-time (DT) pipelined ADCs. In this review article, we introduce a gain-centric ADC model and apply the key criteria derived from the model to transform a DT pipelined ADC into a CT pipelined ADC. We then discuss the design considerations and essential building blocks of the CT pipelined ADC. Finally, we examine several implementations of this architecture with their highlights and challenges.\",\"PeriodicalId\":100633,\"journal\":{\"name\":\"IEEE Open Journal of the Solid-State Circuits Society\",\"volume\":\"3 \",\"pages\":\"162-173\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-09-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/iel7/8782712/10019316/10246305.pdf\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Open Journal of the Solid-State Circuits Society\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10246305/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Open Journal of the Solid-State Circuits Society","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10246305/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Continuous-Time Pipelined ADC: A Breed of Continuous-Time ADCs for Wideband Data Conversion
The continuous-time (CT) pipelined analog-to-digital converter (ADC) is an emerging ADC architecture suitable for wide- bandwidth (BW) digitization in fully integrated receiver applications. It inherits the integration-friendly features of CT
$\Delta \Sigma $
ADCs, such as inherent anti-aliasing, while achieving the wide- BW operation originating from discrete-time (DT) pipelined ADCs. In this review article, we introduce a gain-centric ADC model and apply the key criteria derived from the model to transform a DT pipelined ADC into a CT pipelined ADC. We then discuss the design considerations and essential building blocks of the CT pipelined ADC. Finally, we examine several implementations of this architecture with their highlights and challenges.