有效的肖特基势垒高度调制使用介电偶极为源/漏比接触电阻率的改善

K. Ang, K. Majumdar, K. Matthews, C. Young, C. Kenney, C. Hobbs, P. Kirsch, R. Jammy, R. Clark, S. Consiglio, K. Tapily, Y. Trickett, G. Nakamura, C. Wajda, G. Leusink, M. Rodgers, S. Gausepohl
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引用次数: 15

摘要

通过在金属和硅之间引入超薄ALD高k介电层,我们得到了在300mm晶圆上n型和p型硅的比接触电阻率(ρc)分别为sub-10-8Ω-cm2和sub-2×10-8Ω-cm2的统计显著数据。采用6端跨桥开尔文(6T-CBK)结构进行提取,在这个小的ρc范围内获得了很好的分辨率。通过对多个介电层的测量和基于非平衡格林函数(Non-Equilibrium Green’s Function, NEGF)的量子输运计算,我们清楚地表明,只要介电层的隧穿阻力较小,抑制倏逝金属诱导隙态(MIGS)和界面偶极子的形成对降低ρc起着重要作用。最后,讨论了该器件的瞬态响应、击穿机制和技术基准测试等方面的研究成果。
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Effective Schottky Barrier Height modulation using dielectric dipoles for source/drain specific contact resistivity improvement
We demonstrate statistically significant data for specific contact resistivity (ρc) of sub-10-8Ω-cm2 and sub-2×10-8Ω-cm2 for N-type and P-type Si respectively on 300mm wafer by introducing ultra-thin ALD high-k dielectric layer(s) between the metal and Si. A 6-terminal Cross-Bridge Kelvin (6T-CBK) structure was used for the extraction to achieve excellent resolution in this small ρc range. With the help of measurements from multiple dielectric stacks and Non-Equilibrium Green's Function (NEGF) based quantum transport calculations, we clearly show that the suppression of evanescent metal induced gap states (MIGS) and formation of interface dipole play significant role to reduce the ρc as long as the tunneling resistance of the dielectric stack is small. Finally, transient response, break down mechanism and technology benchmarking are discussed which show promise for sub-14nm node applications.
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