A. Saleem, R. Andersson, M. Bylund, Charlotte Goemare, Guilhem Pacot, M. Kabir, V. Desmaris
{"title":"基于碳纳米纤维和电介质的全固态集成电容器,其比电容高于200nf /mm2","authors":"A. Saleem, R. Andersson, M. Bylund, Charlotte Goemare, Guilhem Pacot, M. Kabir, V. Desmaris","doi":"10.1109/ECTC.2019.00288","DOIUrl":null,"url":null,"abstract":"Complete on-chip fully solid-state 3D integrated capacitors using vertically aligned carbon nanofibers as electrodes to provide a large 3D surface in a MIM configuration have been manufactured and characterized in terms of capacitance per device footprint area, equivalent series resistance (ESR), breakdown voltage and leakage current. The entire manufacturing process of the capacitors is completely CMOS compatible, which along with the low device profile of about 4 µm makes the devices readily available for integration on a CMOS-chip, in 3D stacking, or redistribution layers in a 2.5D interposer technology. Capacitances of 200 nF/mm2, ESR of about 100 mΩ, breakdown voltages of 25 V and leakage current of the order of 0.004 A/F have been measured.","PeriodicalId":6726,"journal":{"name":"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)","volume":"240 1 1","pages":"1870-1876"},"PeriodicalIF":0.0000,"publicationDate":"2019-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Fully Solid-State Integrated Capacitors Based on Carbon Nanofibers and Dielectrics with Specific Capacitances Higher Than 200 nF/mm2\",\"authors\":\"A. Saleem, R. Andersson, M. Bylund, Charlotte Goemare, Guilhem Pacot, M. Kabir, V. Desmaris\",\"doi\":\"10.1109/ECTC.2019.00288\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Complete on-chip fully solid-state 3D integrated capacitors using vertically aligned carbon nanofibers as electrodes to provide a large 3D surface in a MIM configuration have been manufactured and characterized in terms of capacitance per device footprint area, equivalent series resistance (ESR), breakdown voltage and leakage current. The entire manufacturing process of the capacitors is completely CMOS compatible, which along with the low device profile of about 4 µm makes the devices readily available for integration on a CMOS-chip, in 3D stacking, or redistribution layers in a 2.5D interposer technology. Capacitances of 200 nF/mm2, ESR of about 100 mΩ, breakdown voltages of 25 V and leakage current of the order of 0.004 A/F have been measured.\",\"PeriodicalId\":6726,\"journal\":{\"name\":\"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)\",\"volume\":\"240 1 1\",\"pages\":\"1870-1876\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.2019.00288\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2019.00288","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fully Solid-State Integrated Capacitors Based on Carbon Nanofibers and Dielectrics with Specific Capacitances Higher Than 200 nF/mm2
Complete on-chip fully solid-state 3D integrated capacitors using vertically aligned carbon nanofibers as electrodes to provide a large 3D surface in a MIM configuration have been manufactured and characterized in terms of capacitance per device footprint area, equivalent series resistance (ESR), breakdown voltage and leakage current. The entire manufacturing process of the capacitors is completely CMOS compatible, which along with the low device profile of about 4 µm makes the devices readily available for integration on a CMOS-chip, in 3D stacking, or redistribution layers in a 2.5D interposer technology. Capacitances of 200 nF/mm2, ESR of about 100 mΩ, breakdown voltages of 25 V and leakage current of the order of 0.004 A/F have been measured.