8LPP逻辑平台技术，用于高成本效益的大批量生产

2018 IEEE Symposium on VLSI Technology Pub Date : 2018-06-01 DOI:10.1109/VLSIT.2018.8510673

H. Rhee, Ilryong Kim, Jaehun Jeong, Nakjin Son, Heebum Hong, Sungil Cho, Yongsoon Park, Dongwoo Kim, Yunki Choi, Jeonghoon Ahn, S. Kang, K. Yeo, Jungtae Kim, Euncheol Lee, J. Youn, J. Yoon

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引用次数: 8

摘要

8LPP逻辑平台技术支持移动、高性能和低功耗应用，特别是针对移动、人工智能(AI)和加密货币设备。8LPP采用渐进式体FinFET FEOL和44nm无euv多模式BEOL工艺，与之前的10LPP相比，功耗降低7%，面积缩小约15%。与目前的大批量10nm生产相比，成本效益高的大批量生产是通过最小的额外关键层和可比的工艺步骤实现的。

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8LPP Logic Platform Technology for Cost-Effective High Volume Manufacturing

8LPP logic platform technology supports mobile and high-performance and lower power application especially for mobile, artificial intelligence (AI), and cryptocurrency devices. 8LPP is employing the evolutionary generation of bulk FinFET FEOL and 44nm EUV-less multi-patterning BEOL process, resulting in 7% power reduction and ~15% area scaling compared with the previous 10LPP. The cost-effective high volume manufacturing is achieved with the minimum additional critical layers and the comparable process steps over the current high volume 10nm production.

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2018 IEEE Symposium on VLSI Technology

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