用于数据中心Tb/s光互连的3D硅光子中间体,具有双面组装有源元件和集成光电通过SOI硅孔

B. Sirbu, Y. Eichhammer, H. Oppermann, T. Tekin, J. Kraft, V. Sidorov, X. Yin, J. Bauwelinck, C. Neumeyr, Francisco Soares
{"title":"用于数据中心Tb/s光互连的3D硅光子中间体,具有双面组装有源元件和集成光电通过SOI硅孔","authors":"B. Sirbu, Y. Eichhammer, H. Oppermann, T. Tekin, J. Kraft, V. Sidorov, X. Yin, J. Bauwelinck, C. Neumeyr, Francisco Soares","doi":"10.1109/ECTC.2019.00165","DOIUrl":null,"url":null,"abstract":"In this paper, we present the concept, fabrication, process and packaging of a 3D Si photonics interposer. This Si photonics interposer merges passive photonic and electronic functionalities within a single chip. The interposer is populated with active optical and electronic add-ons, which are flip-chip bonded to the interposer using thermo-compression bonding. The interposer itself is then flip-chip bonded to a glass and Si carrier for further testing purposes. This integration concept enables a high connection density (Gb/s/mm²) by assembling 40Gb/s per channel opto-electrical components on both sides of the interposer. Communication between components on both sides of the interposer is enabled by optical and electrical TSVs with a 3dB bandwidth >28GHz. A single mode photonic layer, designed for 1.55µm wavelength is integrated within the interposer to be used for routing and switching of the optical signals. Main fabrication and packaging steps are described here, together with some demonstrator evaluation results.","PeriodicalId":6726,"journal":{"name":"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)","volume":"78 1","pages":"1052-1059"},"PeriodicalIF":0.0000,"publicationDate":"2019-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"3D Silicon Photonics Interposer for Tb/s Optical Interconnects in Data Centers with Double-Side Assembled Active Components and Integrated Optical and Electrical Through Silicon Via on SOI\",\"authors\":\"B. Sirbu, Y. Eichhammer, H. Oppermann, T. Tekin, J. Kraft, V. Sidorov, X. Yin, J. Bauwelinck, C. Neumeyr, Francisco Soares\",\"doi\":\"10.1109/ECTC.2019.00165\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we present the concept, fabrication, process and packaging of a 3D Si photonics interposer. This Si photonics interposer merges passive photonic and electronic functionalities within a single chip. The interposer is populated with active optical and electronic add-ons, which are flip-chip bonded to the interposer using thermo-compression bonding. The interposer itself is then flip-chip bonded to a glass and Si carrier for further testing purposes. This integration concept enables a high connection density (Gb/s/mm²) by assembling 40Gb/s per channel opto-electrical components on both sides of the interposer. Communication between components on both sides of the interposer is enabled by optical and electrical TSVs with a 3dB bandwidth >28GHz. A single mode photonic layer, designed for 1.55µm wavelength is integrated within the interposer to be used for routing and switching of the optical signals. Main fabrication and packaging steps are described here, together with some demonstrator evaluation results.\",\"PeriodicalId\":6726,\"journal\":{\"name\":\"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)\",\"volume\":\"78 1\",\"pages\":\"1052-1059\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-05-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.2019.00165\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2019.00165","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14

摘要

本文介绍了一种三维硅光子中间体的概念、制作、工艺和封装。这种硅光子中间体将无源光子和电子功能合并在一个芯片内。中间层填充有源光学和电子附加件,这些附加件使用热压缩键合倒装芯片连接到中间层。然后将中间介子本身倒装到玻璃和硅载体上,以进行进一步的测试。这种集成概念通过在中间器两侧组装每通道40Gb/s的光电元件,实现了高连接密度(Gb/s/mm²)。中间器两侧组件之间的通信由3dB带宽>28GHz的光学和电气tsv实现。一个单模光子层,设计为1.55 μ m波长集成在中间层中,用于光信号的路由和交换。本文描述了主要的制造和封装步骤,并给出了一些样机的评价结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
3D Silicon Photonics Interposer for Tb/s Optical Interconnects in Data Centers with Double-Side Assembled Active Components and Integrated Optical and Electrical Through Silicon Via on SOI
In this paper, we present the concept, fabrication, process and packaging of a 3D Si photonics interposer. This Si photonics interposer merges passive photonic and electronic functionalities within a single chip. The interposer is populated with active optical and electronic add-ons, which are flip-chip bonded to the interposer using thermo-compression bonding. The interposer itself is then flip-chip bonded to a glass and Si carrier for further testing purposes. This integration concept enables a high connection density (Gb/s/mm²) by assembling 40Gb/s per channel opto-electrical components on both sides of the interposer. Communication between components on both sides of the interposer is enabled by optical and electrical TSVs with a 3dB bandwidth >28GHz. A single mode photonic layer, designed for 1.55µm wavelength is integrated within the interposer to be used for routing and switching of the optical signals. Main fabrication and packaging steps are described here, together with some demonstrator evaluation results.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Further Enhancement of Thermal Conductivity through Optimal Uses of h-BN Fillers in Polymer-Based Thermal Interface Material for Power Electronics A Novel Design of a Bandwidth Enhanced Dual-Band Impedance Matching Network with Coupled Line Wave Slowing A New Development of Direct Bonding to Aluminum and Nickel Surfaces by Silver Sintering in air Atmosphere Signal Integrity of Submicron InFO Heterogeneous Integration for High Performance Computing Applications Multilayer Glass Substrate with High Density Via Structure for All Inorganic Multi-chip Module
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1