XNOR-SRAM:用于二进制/三元深度神经网络的内存计算SRAM宏

2018 IEEE Symposium on VLSI Technology Pub Date : 2018-06-01 DOI:10.1109/VLSIT.2018.8510687

Zhewei Jiang, Shihui Yin, Mingoo Seok, Jae-sun Seo

{"title":"XNOR-SRAM:用于二进制/三元深度神经网络的内存计算SRAM宏","authors":"Zhewei Jiang, Shihui Yin, Mingoo Seok, Jae-sun Seo","doi":"10.1109/VLSIT.2018.8510687","DOIUrl":null,"url":null,"abstract":"We present an in-memory computing SRAM macro that computes XNOR-and-accumulate in binary/ternary deep neural networks on the bitline without row-by-row data access. It achieves 33X better energy and 300X better energy-delay product than digital ASIC, and also achieves significantly higher accuracy than prior in-SRAM computing macro (e.g., 98.3% vs. 90% for MNIST) by being able to support the mainstream DNN/CNN algorithms.","PeriodicalId":6561,"journal":{"name":"2018 IEEE Symposium on VLSI Technology","volume":"129 1","pages":"173-174"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"251","resultStr":"{\"title\":\"XNOR-SRAM: In-Memory Computing SRAM Macro for Binary/Ternary Deep Neural Networks\",\"authors\":\"Zhewei Jiang, Shihui Yin, Mingoo Seok, Jae-sun Seo\",\"doi\":\"10.1109/VLSIT.2018.8510687\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present an in-memory computing SRAM macro that computes XNOR-and-accumulate in binary/ternary deep neural networks on the bitline without row-by-row data access. It achieves 33X better energy and 300X better energy-delay product than digital ASIC, and also achieves significantly higher accuracy than prior in-SRAM computing macro (e.g., 98.3% vs. 90% for MNIST) by being able to support the mainstream DNN/CNN algorithms.\",\"PeriodicalId\":6561,\"journal\":{\"name\":\"2018 IEEE Symposium on VLSI Technology\",\"volume\":\"129 1\",\"pages\":\"173-174\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"251\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE Symposium on VLSI Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2018.8510687\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2018.8510687","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 251

摘要

我们提出了一个内存计算SRAM宏，它可以在二进制/三元深度神经网络中在位线上计算xnor和累加，而不需要逐行访问数据。它实现了比数字ASIC高33倍的能量和300倍的能量延迟积，并且通过能够支持主流的DNN/CNN算法，也实现了比先前的sram计算宏(例如98.3% vs. MNIST的90%)更高的精度。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

XNOR-SRAM: In-Memory Computing SRAM Macro for Binary/Ternary Deep Neural Networks

We present an in-memory computing SRAM macro that computes XNOR-and-accumulate in binary/ternary deep neural networks on the bitline without row-by-row data access. It achieves 33X better energy and 300X better energy-delay product than digital ASIC, and also achieves significantly higher accuracy than prior in-SRAM computing macro (e.g., 98.3% vs. 90% for MNIST) by being able to support the mainstream DNN/CNN algorithms.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2018 IEEE Symposium on VLSI Technology

自引率

0.00%

发文量