{"title":"一种混合信号物理设计及其验证","authors":"Hu Yue-li, Yan Ke","doi":"10.1109/ICEPT.2008.4607009","DOIUrl":null,"url":null,"abstract":"More and more analog and mixed-signal (AMS) blocks are integrated into SoC (system-on-chip) platform due to intense market competition. A mixed signal /mixed power SoC design, using Synopsys Libraries, based on Chartered 0.35 um Salicide 2P4M CMOS mixed signal process is introduced in this paper. The method of supply the core with different powers, isolated the digital part and the analog part and splitting the padring is also proposed. The physical layout design and its verification are implemented using Astro and Calibre.","PeriodicalId":6324,"journal":{"name":"2008 International Conference on Electronic Packaging Technology & High Density Packaging","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2008-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A mixed- signal physical design and its verification\",\"authors\":\"Hu Yue-li, Yan Ke\",\"doi\":\"10.1109/ICEPT.2008.4607009\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"More and more analog and mixed-signal (AMS) blocks are integrated into SoC (system-on-chip) platform due to intense market competition. A mixed signal /mixed power SoC design, using Synopsys Libraries, based on Chartered 0.35 um Salicide 2P4M CMOS mixed signal process is introduced in this paper. The method of supply the core with different powers, isolated the digital part and the analog part and splitting the padring is also proposed. The physical layout design and its verification are implemented using Astro and Calibre.\",\"PeriodicalId\":6324,\"journal\":{\"name\":\"2008 International Conference on Electronic Packaging Technology & High Density Packaging\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-07-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 International Conference on Electronic Packaging Technology & High Density Packaging\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEPT.2008.4607009\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 International Conference on Electronic Packaging Technology & High Density Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEPT.2008.4607009","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
随着市场竞争的加剧，越来越多的模拟和混合信号(AMS)模块被集成到片上系统(SoC)平台中。介绍了一种基于Chartered 0.35 um Salicide 2P4M CMOS混合信号工艺，利用Synopsys库实现的混合信号/混合功率SoC设计。提出了用不同功率供电、数字部分和模拟部分隔离以及分割衬垫的方法。利用Astro和Calibre实现了物理布局设计及其验证。
A mixed- signal physical design and its verification
More and more analog and mixed-signal (AMS) blocks are integrated into SoC (system-on-chip) platform due to intense market competition. A mixed signal /mixed power SoC design, using Synopsys Libraries, based on Chartered 0.35 um Salicide 2P4M CMOS mixed signal process is introduced in this paper. The method of supply the core with different powers, isolated the digital part and the analog part and splitting the padring is also proposed. The physical layout design and its verification are implemented using Astro and Calibre.
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