E. Sorensen, Boris Vaisband, SivaChandra Jangam, T. Shirley, S. Iyer
{"title":"硅互连结构上InP模的集成与表征","authors":"E. Sorensen, Boris Vaisband, SivaChandra Jangam, T. Shirley, S. Iyer","doi":"10.1109/ECTC.2019.00088","DOIUrl":null,"url":null,"abstract":"The silicon interconnect fabric (Si-IF) is a wafer-level packaging platform that enables heterogeneous integration of die at ultra-fine pitch (2 to 10 µm) directly onto a lithographically defined silicon wafer with no intermediate packaging hierarchy. The die are attached with an extremely tight inter-dielet spacing (< 100 µm). The small inter-dielet spacing is especially advantageous in high frequency applications due to reduced loss associated with the transmission line behavior of off-chip interconnects. Since indium phosphide (InP) is a popular technology choice for high frequency applications, the goal of this paper is to investigate the efficacy of direct Au-Au thermo-compression bonding (TCB) of InP die to the Si-IF platform for the first time. To evaluate this process, 84 InP die were successfully bonded to the Si-IF. The sheer strength of the integrated die ranges from 38 MPa to 238 MPa, for die that were attached using pressure ranging, respectively, from 100 MPa to 350 MPa. Daisy chain resistance of the bonded die was measured exhibiting good correlation with calculated theoretical values. After thermal cycling, it was found that 100% of the attached die withstood all thermal stressing despite the thermal mismatch of 2 ppm/K between the die and the Si-IF.","PeriodicalId":6726,"journal":{"name":"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)","volume":"28 1","pages":"543-549"},"PeriodicalIF":0.0000,"publicationDate":"2019-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Integration and Characterization of InP Die on Silicon Interconnect Fabric\",\"authors\":\"E. Sorensen, Boris Vaisband, SivaChandra Jangam, T. Shirley, S. Iyer\",\"doi\":\"10.1109/ECTC.2019.00088\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The silicon interconnect fabric (Si-IF) is a wafer-level packaging platform that enables heterogeneous integration of die at ultra-fine pitch (2 to 10 µm) directly onto a lithographically defined silicon wafer with no intermediate packaging hierarchy. The die are attached with an extremely tight inter-dielet spacing (< 100 µm). The small inter-dielet spacing is especially advantageous in high frequency applications due to reduced loss associated with the transmission line behavior of off-chip interconnects. Since indium phosphide (InP) is a popular technology choice for high frequency applications, the goal of this paper is to investigate the efficacy of direct Au-Au thermo-compression bonding (TCB) of InP die to the Si-IF platform for the first time. To evaluate this process, 84 InP die were successfully bonded to the Si-IF. The sheer strength of the integrated die ranges from 38 MPa to 238 MPa, for die that were attached using pressure ranging, respectively, from 100 MPa to 350 MPa. Daisy chain resistance of the bonded die was measured exhibiting good correlation with calculated theoretical values. After thermal cycling, it was found that 100% of the attached die withstood all thermal stressing despite the thermal mismatch of 2 ppm/K between the die and the Si-IF.\",\"PeriodicalId\":6726,\"journal\":{\"name\":\"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)\",\"volume\":\"28 1\",\"pages\":\"543-549\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-05-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.2019.00088\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2019.00088","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Integration and Characterization of InP Die on Silicon Interconnect Fabric
The silicon interconnect fabric (Si-IF) is a wafer-level packaging platform that enables heterogeneous integration of die at ultra-fine pitch (2 to 10 µm) directly onto a lithographically defined silicon wafer with no intermediate packaging hierarchy. The die are attached with an extremely tight inter-dielet spacing (< 100 µm). The small inter-dielet spacing is especially advantageous in high frequency applications due to reduced loss associated with the transmission line behavior of off-chip interconnects. Since indium phosphide (InP) is a popular technology choice for high frequency applications, the goal of this paper is to investigate the efficacy of direct Au-Au thermo-compression bonding (TCB) of InP die to the Si-IF platform for the first time. To evaluate this process, 84 InP die were successfully bonded to the Si-IF. The sheer strength of the integrated die ranges from 38 MPa to 238 MPa, for die that were attached using pressure ranging, respectively, from 100 MPa to 350 MPa. Daisy chain resistance of the bonded die was measured exhibiting good correlation with calculated theoretical values. After thermal cycling, it was found that 100% of the attached die withstood all thermal stressing despite the thermal mismatch of 2 ppm/K between the die and the Si-IF.