超低电压和超低功耗STT-MRAM的演示,用于兼容0x节点嵌入式LLC应用

G. Jan, L. Thomas, S. Le, Yuan-Jen Lee, Huanlong Liu, Jian Zhu, J. Iwata-Harms, Sahil J. Patel, R. Tong, V. Sundar, S. Serrano-Guisan, D. Shen, R. He, J. Haq, Z. Teng, V. Lam, Yi Yang, Yu-Jen Wang, T. Zhong, H. Fukuzawa, P. Wang
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引用次数: 21

摘要

我们首次提出了超低工作电压的STT-MRAM器件,其功率与下一代0x节点逻辑电压兼容。通过设计隧道屏障和提高器件的效率,我们报告了创纪录的低写入电压0.17V,错误率为1ppm,这已经实现了20ns写入操作,写入电流仅为35uA。我们进一步证明了在0.25V和50uA的电压和电流下,使用10ns写入脉冲在相同的30nm器件上使用扩展的400C热预算,同时保留功能,证实了这些数据几乎无限的耐久性和85°C下的保留。最后,TDDB研究证实了这些器件在工作电压下的几乎无限的耐久性。
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Demonstration of Ultra-Low Voltage and Ultra Low Power STT-MRAM designed for compatibility with 0x node embedded LLC applications
We present for the first time STT-MRAM devices with ultra low operating voltage and power compatible with next generation 0x node logic voltages. By engineering the tunnel barrier and improving the efficiency of the devices we report a record low writing voltage of 0.17V for a 1ppm error rate, which has been achieved for a 20ns write operation using a writing current of only 35uA. We further demonstrate error rates below 10-9 at voltage and current at 0.25V and 50uA using 10ns writing pulses on the same 30nm devices with extended 400C thermal budget while preserving functionality confirm the almost unlimited endurance of these data and retention at 85°C. Finally, TDDB studies confirm the almost unlimited endurance of these devices at the operating voltage.
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