维特比解码器软硬件协同设计

Ming Li, Tao Wen
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引用次数: 4

摘要

卷积码和维特比译码是用于信道编码的方法之一。卷积编码以其优异的性能在许多方面得到了广泛的应用。然而,无论是编码算法还是硬件实现都非常复杂。随着SOC设计的不断深入,软硬件协同设计技术作为SOC设计的重要组成部分变得越来越重要。本文提出了一种用于维特比解码器设计的软硬件平台。该平台包括嵌入式软件、硬件加速和外设接口。实践证明,该平台具有良好的实用性和强大的验证功能,可以实现维特比解码器的优化设计。
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Hardware /software co-design for Viterbi decoder
Convolutional code and Viterbi decoding is one of the methods used for channel coding. Convolutional coding is widely used in many aspects because of its excellent performance. However, both the coding algorithm and hardware implementation are very complex. Along with the continuous deepening of SOC design, hardware-software co-design technology has become more and more important as one part of SOC design. A hardware-software platform used for the design of the Viterbi decoder is proposed in this paper. The platform includes embedded software, hardware acceleration, and peripheral interface. Good practicality and powerful verification functions are proved, and optimum design for the Viterbi decoder can be achieved by using the platform.
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