自定义基于fpga的流计算微架构

J. Alves, P. Diniz
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引用次数: 6

摘要

本文描述了一种基于自定义可编程fpga处理器的微架构,它直接支持依赖于自定义缓存存储的流和矢量计算。处理器将自定义数据路径与几个并行数据端口结合起来,以流模式访问操作数,从而有效地支持高级语言中的嵌套循环结构,同时减轻对外部内存带宽的影响。该体系结构利用具有多维嵌套循环功能的微编码序列器,利用流数据访问的跨行访问模式。我们在Xilinx的Virtex-4 FPGA器件上展示了该架构的主要组件的综合结果。结果表明,该架构具有极高的灵活性,并且消耗较少的FPGA资源。
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Custom FPGA-based micro-architecture for streaming computing
This paper describes a micro-architecture for a custom programmable FPGA-based processor, with direct support for streaming and vector computations relying on custom cache memory storage. The processor combines a custom data-path with several parallel data ports for accessing operands in streaming mode thus efficiently supporting nested looping constructs found in high-level languages while mitigating the impact on external memory bandwidth. The architecture leverages the strided access patterns of streaming data access using a microcoded sequencer with multi-dimensional nested looping capability. We present synthesis results for the main components of the architecture on a Xilinx's Virtex-4 FPGA device. The results reveal the architecture to be extremely flexible and consume few FPGA resources.
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