利用工艺建模研究0.12 CMOS工艺的应力敏感性

International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224) Pub Date : 2001-12-02 DOI:10.1109/IEDM.2001.979642

V. Senez, T. Hoffmann, E. Robilliart, G. Bouché, H. Jaouen, M. Lunenborg, G. Carnevale

{"title":"利用工艺建模研究0.12 CMOS工艺的应力敏感性","authors":"V. Senez, T. Hoffmann, E. Robilliart, G. Bouché, H. Jaouen, M. Lunenborg, G. Carnevale","doi":"10.1109/IEDM.2001.979642","DOIUrl":null,"url":null,"abstract":"This paper presents a mechanical analysis of the entire process flow (i.e.: Front (FEOL) and Back (BEOL) End of Line) of a 0.12 CMOS technology using 2D numerical modeling. This study gives several quantitative modifications concerning the process conditions and device geometries in order to reduce the residual mechanical stress in the devices.","PeriodicalId":13825,"journal":{"name":"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)","volume":"25 1","pages":"38.1.1-38.1.4"},"PeriodicalIF":0.0000,"publicationDate":"2001-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Investigations of stress sensitivity of 0.12 CMOS technology using process modeling\",\"authors\":\"V. Senez, T. Hoffmann, E. Robilliart, G. Bouché, H. Jaouen, M. Lunenborg, G. Carnevale\",\"doi\":\"10.1109/IEDM.2001.979642\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a mechanical analysis of the entire process flow (i.e.: Front (FEOL) and Back (BEOL) End of Line) of a 0.12 CMOS technology using 2D numerical modeling. This study gives several quantitative modifications concerning the process conditions and device geometries in order to reduce the residual mechanical stress in the devices.\",\"PeriodicalId\":13825,\"journal\":{\"name\":\"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)\",\"volume\":\"25 1\",\"pages\":\"38.1.1-38.1.4\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-12-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2001.979642\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2001.979642","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 10

摘要

本文采用二维数值模型对0.12 CMOS技术的整个工艺流程(即:前(FEOL)和后(BEOL)线端)进行了力学分析。本研究对工艺条件和器件几何形状进行了定量修改，以减少器件中的残余机械应力。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

Investigations of stress sensitivity of 0.12 CMOS technology using process modeling

This paper presents a mechanical analysis of the entire process flow (i.e.: Front (FEOL) and Back (BEOL) End of Line) of a 0.12 CMOS technology using 2D numerical modeling. This study gives several quantitative modifications concerning the process conditions and device geometries in order to reduce the residual mechanical stress in the devices.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)

自引率

0.00%

发文量