门电流:建模，/spl δ /L提取和对射频性能的影响

International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224) Pub Date : 2001-12-02 DOI:10.1109/IEDM.2001.979486

R. Van Langevelde, A. Scholten, R. Duffy, F. Cubaynes, M. J. Knitel, D. Klaassen

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引用次数: 44

摘要

本文提出了一种新的物理栅泄漏模型，该模型既准确又简单。它只使用5个参数，使参数提取简单。因此，该模型可用于现代CMOS技术的有效长度提取。研究了栅极电流对射频性能的影响。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Gate current: Modeling, /spl Delta/L extraction and impact on RF performance

In this paper a new physical gate leakage model is introduced, which is both accurate and simple. It only uses 5 parameters, making parameter extraction straightforward. As a result the model can be used to extract effective length for modern CMOS technologies. The influence of gate current on the RF performance is studied.

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International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)

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