{"title":"An economic selecting model for DFT strategies","authors":"Yu-Ting Lin, T. Ambler","doi":"10.1109/VTS.2005.29","DOIUrl":null,"url":null,"abstract":"Exploiting the knowledge-based technology and multi-objective analysis, this paper presents a selecting model and its prototype implementation for design for testability (DFT) strategies. Cores to the knowledge-based selecting are decision tree-based knowledge representation models. Keys to the decision tree model are human-like decision procedures and time elimination of defining cost related equations. Test runs over a design-and-test compatible environment demonstrate both feasibility and potential effectiveness of the decision tree selecting model to support both the current and future needs of VLSI testing.","PeriodicalId":268324,"journal":{"name":"23rd IEEE VLSI Test Symposium (VTS'05)","volume":"9 10","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"23rd IEEE VLSI Test Symposium (VTS'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTS.2005.29","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Exploiting the knowledge-based technology and multi-objective analysis, this paper presents a selecting model and its prototype implementation for design for testability (DFT) strategies. Cores to the knowledge-based selecting are decision tree-based knowledge representation models. Keys to the decision tree model are human-like decision procedures and time elimination of defining cost related equations. Test runs over a design-and-test compatible environment demonstrate both feasibility and potential effectiveness of the decision tree selecting model to support both the current and future needs of VLSI testing.