Reliability challenges for power devices under active cycling

Abstract

Power stages are subject to severe stress due to active cycling, resulting in e.g. fast thermal cycling. While some applications require several hundred millions of cycles under normal operation conditions, “disturbances” such as short circuit pose additional challenges. These issues are neither addressed by “classical” silicon wafer technology qualification nor by standard product qualification procedures. Challenges and limitations in applying the principles of Robustness Validation to these issues are discussed.