1T MEMS Memory Based on Suspended Gate MOSFET

Abstract

The design, operation, characterization and scalability of a 1T SG-MOSFET memory cell that combines a MOSFET solid-state device and a microelectromechanical gate electrode, is reported. The proposed SG-MOSFET memory uses the charging of the gate dielectric by direct contact of the conductive gate with the gate insulator during mechanical pull-in, which results in I-V hysteresis. Very low gate leakage and excellent current ratio in programmed logic states are demonstrated. Cycling without significant degradation up to 105 cycles is experimentally shown and the scalability of the cell is explored by simulation