{"title":"Useful numerical techniques for compact modeling","authors":"C. McAndrew","doi":"10.1109/ICMTS.2002.1193183","DOIUrl":null,"url":null,"abstract":"This paper presents three useful numerical techniques for compact modeling. First, a new approach to modeling non-uniform vertical doping profiles in MOSFETs is presented, based on non-linear mapping of the backgate bias. Second, a technique that guarantees that limiting of V/sub ds/ at saturation will not lead to glitches in output conductance is presented. Finally, requirements for limiting functions for V/sub ds/ that do not cause discontinuities in high order derivatives at V/sub ds/ = 0 are defined. Examples of limiting functions that maintain proper symmetry are given. The techniques to eliminate glitches in output conductance and maintain symmetry are applicable to MOSFET and resistor models.","PeriodicalId":188074,"journal":{"name":"Proceedings of the 2002 International Conference on Microelectronic Test Structures, 2002. ICMTS 2002.","volume":"1128 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2002 International Conference on Microelectronic Test Structures, 2002. ICMTS 2002.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.2002.1193183","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
This paper presents three useful numerical techniques for compact modeling. First, a new approach to modeling non-uniform vertical doping profiles in MOSFETs is presented, based on non-linear mapping of the backgate bias. Second, a technique that guarantees that limiting of V/sub ds/ at saturation will not lead to glitches in output conductance is presented. Finally, requirements for limiting functions for V/sub ds/ that do not cause discontinuities in high order derivatives at V/sub ds/ = 0 are defined. Examples of limiting functions that maintain proper symmetry are given. The techniques to eliminate glitches in output conductance and maintain symmetry are applicable to MOSFET and resistor models.