{"title":"Yield considerations in the choice of 3D technology","authors":"G. Smith, L. Smith, S. Hosali, S. Arkalgud","doi":"10.1109/ISSM.2007.4446880","DOIUrl":null,"url":null,"abstract":"Die-to-wafer (DtW) stacking offers a yield advantage over wafer-to-wafer (WtW) and system-on-a-chip (SoC) if testing can identify good die and reduce stacking of good and bad die pairs. In this study, an SoC is broken into two equal areas to form a 3D system, and best case yields of DtW and WtW is compared. Testing need not be perfect to realize significant yield advantage with DtW.","PeriodicalId":325607,"journal":{"name":"2007 International Symposium on Semiconductor Manufacturing","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"49","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 International Symposium on Semiconductor Manufacturing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSM.2007.4446880","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 49
Abstract
Die-to-wafer (DtW) stacking offers a yield advantage over wafer-to-wafer (WtW) and system-on-a-chip (SoC) if testing can identify good die and reduce stacking of good and bad die pairs. In this study, an SoC is broken into two equal areas to form a 3D system, and best case yields of DtW and WtW is compared. Testing need not be perfect to realize significant yield advantage with DtW.
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