50 nm-Gate All Around (GAA)-Silicon On Nothing (SON)-devices: a simple way to co-integration of GAA transistors within bulk MOSFET process

S. Monfray, T. Skotnicki, Y. Morand, S. Descombes, P. Coronel, P. Mazoyer, S. Harrison, P. Ribot, A. Talbot, D. Dutartre, M. Haond, R. Palla, Y. L. Friec, F. Leverd, M. Nier, C. Vizioz, D. Louis
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引用次数: 64

Abstract

For the first time, both GAA and bulk devices were shown to be operational on the same chip. Not all issues have been solved yet (gate materials, access resistance) but already the first-try results are very encouraging: I/sub on/=170 /spl mu/A//spl mu/m@1.2 V and gate oxide of 20 /spl Aring/. Thanks to the GAA intrinsic immunity to SCE, its DIBL was as small as 10 mV compared with 600 mV on bulk control devices. Calibrating a 2D simulator on this electrical data, the performance of the GAA was estimated to be at least 1500 /spl mu/A//spl mu/m@ 1 V with comfortable gate oxide of 20 /spl Aring/, once having corrected for the large R/sub access/ (/spl sim/3000 /spl Omega/), that was simply due to non-optimal mask layout used in this first device realization.
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50nm栅极全绕(GAA)-无硅(SON)器件:在大块MOSFET工艺中实现GAA晶体管协整的简单方法
第一次,GAA和批量器件被证明可以在同一芯片上运行。并不是所有的问题都已经解决了(栅极材料,接入电阻),但第一次尝试的结果已经非常令人鼓舞:I/sub on/=170 /spl mu/A//spl mu/m@1.2 V和栅极氧化物为20 /spl Aring/。由于GAA对SCE的固有抗扰性,与批量控制器件的600 mV相比,其DIBL低至10 mV。在此电气数据上校准2D模拟器,GAA的性能估计至少为1500 /spl mu/ a/ /spl mu/m@ 1v,舒适的栅极氧化物为20 /spl Aring/,一旦校正了大R/sub访问/ (/spl sim/3000 /spl Omega/),这仅仅是由于在第一个器件实现中使用的非最佳掩模布局。
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