Spin-on dielectric stack low-k integration with EB curing technology for 45nm-node and beyond

H. Nagai, K. Maekawa, M. Iwashita, M. Muramatsu, K. Kubota, K. Hinata, T. Kokubo, A. Shiota, M. Hattori, H. Nagano, K. Tokushige, M. Kodera, K. Mishima
{"title":"Spin-on dielectric stack low-k integration with EB curing technology for 45nm-node and beyond","authors":"H. Nagai, K. Maekawa, M. Iwashita, M. Muramatsu, K. Kubota, K. Hinata, T. Kokubo, A. Shiota, M. Hattori, H. Nagano, K. Tokushige, M. Kodera, K. Mishima","doi":"10.1109/IITC.2004.1345721","DOIUrl":null,"url":null,"abstract":"To achieve effective k value less than 3.0, we investigated spin-on dielectric stack damascene integration scheme with electron beam (EM) cure. By using porous-MSQ (k=2.3) as ILD and dense-MSQ (k=2.9) as hard mask (HM), effective k value could be lowered, and by EB curing the full dielectric stack only once, mechanical strength for both ILD and HM were improved and a reduced thermal budget was obtained. In addition, a low damage resist strip process for the low-k materials was evaluated. These elements of BEOL technology have applicability to 45nm technology node and beyond.","PeriodicalId":148010,"journal":{"name":"Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IITC.2004.1345721","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

To achieve effective k value less than 3.0, we investigated spin-on dielectric stack damascene integration scheme with electron beam (EM) cure. By using porous-MSQ (k=2.3) as ILD and dense-MSQ (k=2.9) as hard mask (HM), effective k value could be lowered, and by EB curing the full dielectric stack only once, mechanical strength for both ILD and HM were improved and a reduced thermal budget was obtained. In addition, a low damage resist strip process for the low-k materials was evaluated. These elements of BEOL technology have applicability to 45nm technology node and beyond.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
45纳米及以上节点的自旋介电堆低k集成与EB固化技术
为了使有效k值小于3.0,我们研究了电子束固化的自旋介电堆damascene积分方案。采用多孔- msq (k=2.3)作为ILD,采用致密- msq (k=2.9)作为硬掩膜(HM),可以降低有效k值,并且只对全介电层进行一次EB固化,可以提高ILD和HM的机械强度,减少热平衡。此外,还对低k材料的低抗损伤带工艺进行了评价。BEOL技术的这些元素适用于45纳米及以上的技术节点。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Optimal implementation of sea of leads (SoL) compliant interconnect technology Film properties and integration performance of a nano-porous carbon doped oxide Material issues for nanoporous ultra low-k dielectrics Ash-induced modification of porous and dense SiCOH inter-level-dielectric (ILD) materials during damascene plasma processing Robust multilevel interconnects with a nano-clustering porous low-k (k<2.3)
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1