A robust wafer thinning down to 2.6-μm for bumpless interconnects and DRAM WOW applications

Y. Kim, S. Kodama, Y. Mizushima, T. Nakamura, N. Maeda, K. Fujimoto, A. Kawai, K. Arai, T. Ohba
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引用次数: 18

Abstract

An ultra-thinning down to 2.6-μm with and without Cu contamination at 1013 atoms/cm2 using 300-mm wafer proven by 2Gb DRAM has been developed for the first time. The impact of Si thickness and Cu contamination at wafer backside for DRAM yield including retention characteristics is described. Thickness uniformity for all wafers after thinning was below 2-μm within 300-mm wafer. A degradation in terms of retention characteristics occurred after thinning down to 2.6-μm while no degradation after thinning down to 5.6-μm for both wafer and package level test were found.
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坚固的晶圆薄化至2.6 μm,适用于无凹凸互连和DRAM WOW应用
通过2Gb DRAM验证的300mm晶圆,在1013个原子/cm2的条件下,首次开发出了具有Cu污染和不含Cu污染的2.6 μm超薄层。描述了硅厚度和晶圆背面铜污染对DRAM良率的影响,包括保留特性。减薄后的所有晶圆在300mm晶圆内厚度均匀性均在2 μm以下。在晶圆级和封装级测试中,当厚度减薄至2.6 μm时,保留率下降,而当厚度减薄至5.6 μm时,保留率没有下降。
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